74AHC1G66 반도체 회로 부품 판매점

Bilateral switch



NXP Semiconductors 로고
NXP Semiconductors
74AHC1G66 데이터시트, 핀배열, 회로
INTEGRATED CIRCUITS
DATA SHEET
74AHC1G66; 74AHCT1G66
Bilateral switch
Product specification
Supersedes data of 2002 Feb 15
2002 Jun 06

74AHC1G66 데이터시트, 핀배열, 회로
Philips Semiconductors
Bilateral switch
Product specification
74AHC1G66; 74AHCT1G66
FEATURES
Very low ON-resistance:
– 26 (typical) at VCC = 3.0 V
– 16 (typical) at VCC = 4.5 V
– 14 (typical) at VCC = 5.5 V.
ESD protection:
– HBM EIA/JESD22-A114-A exceeds 2000 V
– MM EIA/JESD22-A115-A exceeds 200 V
– CDM EIA/JESD22-C101 exceeds 1000 V.
High noise immunity
Low power dissipation
Balanced propagation delays
SOT353 and SOT753 package
Output capability: non standard
Specified from 40 to +125 °C.
DESCRIPTION
The 74AHC1G/AHCT1G66 is a high-speed Si-gate CMOS
device.
The 74AHC1G/AHCT1G66 provides an analog switch.
The switch has two input/output pins (Y and Z) and an
active HIGH enable input pin (E). When pin E is LOW, the
analog switch is turned off.
QUICK REFERENCE DATA
Ground = 0 V; Tamb = 25 °C; tr = tf 3 ns.
SYMBOL
PARAMETER
CONDITIONS
tPZH/tPZL
tPHZ/tPLZ
CI
CPD
CS
turn-on time E to Vos
turn-off time E to Vos
input capacitance
power dissipation capacitance
switch capacitance
CL = 15 pF; RL = 1 k;
VCC = 5 V
CL = 15 pF; RL = 1 k;
VCC = 5 V
CL = 50 pF; f = 10 MHz;
notes 1 and 2
Notes
1. CPD is used to determine the dynamic power dissipation (PD in µW).
PD = CPD × VCC2 × fi + ((CL + CS) × VCC2 × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
CS = maximum switch capacitance in pF;
VCC = supply voltage in Volts.
2. The condition is VI = GND to VCC.
TYPICAL
AHC1G AHCT1G
33
UNIT
ns
5 5 ns
2 2 pF
13 15 pF
4 4 pF
2002 Jun 06
2




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