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PDF 74ACT163 Data sheet ( Hoja de datos )
| Número de pieza | 74ACT163 | |
| Descripción | SYNCHRONOUS PRESETTABLE 4-BIT COUNTER | |
| Fabricantes | STMicroelectronics | |
| Logotipo |  |
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® 74ACT163
SYNCHRONOUS PRESETTABLE 4-BIT COUNTER
s HIGH SPEED:
fMAX =200 MHz (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA = 25 oC
s COMPATIBLE WITH TTL OUTPUTS
VIH = 2V (MIN), VIL = 0.8V (MAX)
s 50Ω TRANSMISSION LINE DRIVING
CAPABILITY
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC (OPR) = 4.5V to 5.5V
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 163
s IMPROVED LATCH-UP IMMUNITY
DESCRIPTION
The ACT163 is a high-speed CMOS
SYNCRONOUS PRESETTABLE COUNTER
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology. It is
ideal for low power applications mantaining high
speed operation similar to eqivalent Bipolar
Schottky TTL. It is a 4 bit binary counter with
Synchronous Clear.
The circuits have four fundamental modes of
operation, in order of preference: synchronous
reset, parallel load, count-up and hold. Four
control inputs, Master Reset (CLEAR), Parallel
PIN CONNECTION AND IEC LOGIC SYMBOLS
BM
(Plastic Package)
(Micro Package)
ORDER CODES :
74ACT163B
74ACT163M
Enable Input (LOAD), Count Enable Input (PE)
and Count Enable Carry Input (TE), determine
the mode of operation as shown in the Truth
Table. A LOW signal on CLEAR overrides
counting and parallel loading and allows all
output to go LOW on the next rising edge of
CLOCK. A LOW signal on LOAD overrides
counting and allows information on Parallel Data
Qn inputs to be loaded into the flip-flops on the
next rising edge of CLOCK. With LOAD and
CLEAR, PE and TE permit counting when both
are HIGH. Conversely, a LOW signal on either
PE and TE inhibits counting.
The device is designed to interface directly High
Speed CMOS systems with TTL, NMOS and
CMOS output voltage levels.
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
December 1998
1/11
1 page  
74ACT163
AC ELECTRICAL CHARACTERISTICS (CL = 50 pF, RL = 500 Ω, Input tr = tf =3 ns)
Symb ol
Parameter
tPLH Propagation Delay Time
tPHL CK to Q
tPLH Propagation Delay Time
tPHL CK to CARRY OUT
tPLH Propagation Delay Time
tPHL PE to CARRY OUT
tw CK pulse Width (LOAD)
HIGH or LOW
tw CK pulse Width (COUNT)
HIGH or LOW
ts Setup Time HIGH or LOW
(INPUT to CK)
th Hold Time HIGH or LOW
(INPUT to CK)
ts Setup Time HIGH or LOW
(CLEAR to CK)
th Hold Time HIGH or LOW
(CLEAR to CK)
ts Setup Time HIGH or LOW
(LOAD to CK)
th Hold Time HIGH or LOW
(LOAD to CK)
ts Setup Time HIGH or LOW
(PE or TE to CK)
th Hold Time HIGH or LOW
(PE or TE to CK)
fMAX Maximum Clock Frequency
(*) Voltage range is 3.3V ± 0.3V
(**) Voltage range is 5V ± 0.5V
T est Con ditio n
VCC
(V)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
4.5(*)
Valu e
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
1.5 5.5 10.0
11.0
Unit
ns
1.5 5.5 11.0
13.0 ns
1.5 3.5 9.0
10.5 ns
2.0 3.5
3.5 ns
2.0 3.5
3.5 ns
2.0 4.0
5.0
ns
-0.7 0.5
1.0 ns
1.5 3.0
4.0 ns
-0.5 0.5
1.0
ns
3.0 6.0
8.0 ns
-1.5 0
0.5 ns
3.0 5.5
6.5 ns
-1.5 0
0.5 ns
120 200 105 MHz
CAPACITIVE CHARACTERISTICS
Symb ol
Parameter
Test Conditions
VCC
(V)
Valu e
TA = 25 oC
-40 to 85 oC
Min. T yp. Max. Min. Max.
Unit
CIN Input Capacitance
5.0
4.5 pF
CPD Power Dissipation
Capacitance (note 1)
5.0 fIN = 10 MHz
35
pF
1) CPD isdefined as the value of the IC’sinternal equivalent capacitance which is calculated fromthe operating current consumption without load. (Referto
Test Circuit).Average operting current can be obtained by the following equation. ICC(opr) = CPD • VCC • fIN + ICC/n(per circuit)
5/11
5 Page 
74ACT163
Information furnished is believed to be accurate and reliable. However, STMicroelectronics assumes no responsibility for the consequences
of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No license is
granted by implication or otherwise under any patent or patent rights of STMicroelectronics. Specification mentioned in this publication are
subject to change without notice. This publication supersedes and replaces all information previously supplied. STMicroelectronics products
are not authorized for use as critical components in life support devices or systems without express written approval of STMicroelectronics.
The ST logo is a registered trademark of STMicroelectronics
© 1998 STMicroelectronics – Printed in Italy – All Rights Reserved
STMicroelectronics GROUP OF COMPANIES
Australia - Brazil - Canada - China - France - Germany - Italy - Japan - Korea - Malaysia - Malta - Mexico - Morocco - The Netherlands -
Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
http://www.st.com
.
11/11
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| Páginas | Total 11 Páginas | |
| PDF Descargar | [ Datasheet 74ACT163.PDF ] | |
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