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FDC6323 반도체 회로 부품 판매점

Integrated Load Switch



Fairchild Semiconductor 로고
Fairchild Semiconductor
FDC6323 데이터시트, 핀배열, 회로
March 1999
FDC6323L
Integrated Load Switch
General Description
These Integrated Load Switches are produced using
Fairchild's proprietary, high cell density, DMOS
technology. This very high density process is
especially tailored to minimize on-state resistance and
provide superior switching performance. These
devices are particularly suited for low voltage high
side load switch application where low conduction loss
and ease of driving are needed.
Features
VDROP=0.2V @ VIN=5V, IL=1A, VON/OFF= 1.5V to 8V
VDROP=0.3V @ VIN=3.3V, IL=1A, VON/OFF= 1.5V to 8V.
High density cell design for extremely low on-resistance.
VON/OFF Zener protection for ESD ruggedness.
>6KV Human Body Model.
SuperSOTTM-6 package design using copper lead frame
for superior thermal and electrical capabilities.
SOT-23
SuperSOTTM-6
SuperSOTTM-8
SO-8
SOT-223
SOIC-16
pin 1
SuperSOT TM-6
Vin,R1 4
O N / O FF 5
R1,C1 6
Q2
Q1
3 Vout,C1
2 Vout,C1
IN
EQUIVALENT CIRCUIT
+VDROP -
1 R2
O N / O FF
OUT
See Application Circuit
Absolute Maximum Ratings TA = 25°C unless otherwise noted
Symbol Parameter
VIN
VON/OFF
IL
Input Voltage Range
On/Off Voltage Range
Load Current @ VDROP=0.5V - Continuous (Note 1)
- Pulsed
(Note 1 & 3)
PD
TJ,TSTG
ESD
Maximum Power Dissipation
(Note 2a)
Operating and Storage Temperature Range
Electrostatic Discharge Rating MIL-STD-883D Human Body
Model (100pf/1500Ohm)
THERMAL CHARACTERISTICS
RθJA Thermal Resistance, Junction-to-Ambient (Note 2a)
RθJC Thermal Resistance, Junction-to-Case (Note 2)
© 1999 Fairchild Semiconductor Corporation
FDC6323L
3-8
1.5 - 8
1.5
2.5
0.7
-55 to 150
6
180
60
Units
V
V
A
W
°C
kV
°C/W
°C/W
FDC6323L Rev.F


FDC6323 데이터시트, 핀배열, 회로
Electrical Characteristics (TA = 25°C unless otherwise noted)
Symbol Parameter
Conditions
Min Typ Max Units
OFF CHARACTERISTICS
IFL Forward Leakage Current
IRL Reverse Leakage Current
ON CHARACTERISTICS (Note 3)
VIN = 8 V, VON/OFF = 0 V
VIN = -8 V, VON/OFF = 0 V
1 µA
-1 µA
VIN
VON/OFF
VDROP
IL
Input Voltage
On/Off Voltage
Conduction Voltage Drop @ 1A
Load Current
VIN = 5 V, VON/OFF = 3.3 V
VIN = 3.3 V, VON/OFF = 3.3 V
VDROP = 0.2 V, VIN = 5 V, VON/OFF = 3.3 V
VDROP = 0.3 V, VIN = 3.3 V, VON/OFF = 3.3 V
38
1.5 8
0.145 0.2
0.178 0.3
1
1
V
V
V
A
Notes:
1. VIN=8V, VON/OFF=8V, VDROP=0.5V, TA=25oC
2. RθJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. RθJC is guaranteed
by design while RθCA is determined by the user's board design.
( ) = = = ( ) ×PD t
TJ TA
RθJ A(t)
TJ TA
RθJ C+RθCA(t)
I
2
D
t
RDS(ON)@TJ
Typical RθJA for single device operation using the board layouts shown below on FR-4 PCB in a still air environment:
a. 180oC/W when mounted on a 2oz minimum copper pad.
2a
Scale 1 : 1 on letter size paper
3. Pulse Test: Pulse Width < 300µs, Duty Cycle < 2.0%
FDC6323L Rev.F




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