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Clare Inc. |
Features
• Generates standard call progress tones
• Digital input control
• Linear (analog) output
• Power output capable of driving standard line
• 14-pin DIP and 16-pin SOIC package types
• Single supply 5V CMOS (low power)
• Inexpensive 3.58 MHz time base
• Temperature range from -25ºC to 70ºC (-01 ver-
sion)
• Temperature range from -40ºC to 85ºC (-02 ver-
sion)
Applications
• Telephone systems
• Test equipment
• Callback
• Security systems
• Billing systems
M-991
Call Progress Tone Generator
Description
The M-991 is a call progress tone generator integrated
circuit for use in telephone systems. The circuit uses
low-power CMOS techniques to generate tones which
are digitally controlled and highly linear. The M-991 is
designed to permit operation with almost any system.
The use of integrated circuit techniques allows the M-
991 to incorporate the control, tone generating, and
power output buffer into a single 14-pin DIP or a 16-pin
SOIC. A 3.58-MHz (color burst) crystal-controlled time
base guarantees accuracy and repeatability.
Ordering Information
Part #
M-991
M-991-01SM
M-991-01SMTR
M-991-02SM
M-991-02SMTR
Description
14-pin plastic DIP
16-pin SOIC
16-pin SOIC Tape and Reel
16-pin SOIC, Extended
Temperature Range
16-pin SOIC, Extended
Temperature Range, Tape and
Reel
Pin Assignments
Block Diagram
DS-M991-R1
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1
M-991
Absolute Maximum Ratings
Storage Temperature
-55° to 125° C
Operating Ambient Temperature
-25° to 70° C
Operating Ambient Temperature
for the M-991-02SM
-40° to 85° C
VDD 7.0V
Any Input Voltage
VSS -0.6 to VDD +0.6V
Note:
1. Exceeding these ratings may permanently damage the M-991.
Absolute Maximum Ratings are stress ratings. Stresses in
excess of these ratings can cause permanent damage to
the device. Functional operation of the device at these or
any other conditions beyond those indicated in the opera-
tional sections of this data sheet is not implied. Exposure of
the device to the absolute maximum ratings for an extend-
ed period may degrade the device and effect its reliability.
Specifications
Parameter
Power Supply
and Reference
VDD
Current Drain, IDD
Oscillator
VREF Pin:
Deviation from (VDD + VSS)/2
Internal Resistance from VREF
to VDD, VSS
Frequency Deviation
External Clock: (XOUT open)
VIL
VIH
Duty Cycle
XIN, XOUT Loading:
Capacitance
Resistance
Tone Output
Frequency Deviation
Level
Distorting Components
Idle
OUTDRIVE Envelope Rise Time
Control
DX, CE Pns:
VIL
VIH
Mute Pins:
VOL (ISINK = -100 µA)
Timing
VOH (ISOURCE = 100 µA)
Data Setup (tDS)
Data Hold (tDH)
Chip Enable Fall (tPL)
Tone On Delay (tTO)
Tone Off Delay (tTD)
Mute Delay from Outdrive (tMO)
Notes: (unless otherwise specified)
1.
2.
All DC voltages are
Vrms per tone, 540
referenced
W load.
to
VSS.
3. Any one frequency relative to the lowest level output tone (f<4000 Hz).
4. 0 dBm = 0.775 Vrms.
5. To 90% maximum amplitude.
6. For all supply voltages in the operating range.
Min
4.75
-
-2
3.25
-0.01
0
VDD - 0.2
40
-
20
-0.5
100
-35
-
-
-
2.5
-
VDD - 1.5
200
10
-
-
-
-
Typ
-
2.0/4.0
Max
5.25
-
Units
V
mA
- +2 %
- 6.75 kΩ
- +0.01 %
- 0.2 V
- VDD V
- 60 %
- 10 pF
- - MΩ
- +0.5 %
- 180 mV
- - dB
- -60 dBm
- 4 ms
- 0.5 V
--V
- 1.5
--
--
--
- 90
-5
-5
- 200
7. At XOUT pin as compared to 3.579545 MHz.
8. OUTDRIVE with load >5 KW/OUTDRIVE with
540 W load.
9. Resistance at VREF to VDD or VSS > 1 MW.
10. Crystal oscillator active.
11. Measured 90% to 10%.
V
V
ns
ns
ns
ms
ms
ns
Notes
1
8
7
10
-
-
2
3
4
5
6
11
2
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Rev. 1
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