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ADF4211 반도체 회로 부품 판매점

Dual RF/IF PLL Frequency Synthesizers



Analog Devices 로고
Analog Devices
ADF4211 데이터시트, 핀배열, 회로
a Dual RF/IF PLL Frequency Synthesizers
ADF4210/ADF4211/ADF4212/ADF4213
FEATURES
ADF4210: 550 MHz/1.2 GHz
ADF4211: 550 MHz/2.0 GHz
ADF4212: 1.0 GHz/2.7 GHz
ADF4213: 1.0 GHz/3 GHz
2.7 V to 5.5 V Power Supply
Separate Charge Pump Supply (VP) Allows Extended
Tuning Voltage in 3 V Systems
Programmable Dual Modulus Prescaler
RF and IF: 8/9, 16/17, 32/33, 64/65
Programmable Charge Pump Currents
3-Wire Serial Interface
Analog and Digital Lock Detect
Fastlock Mode
Power-Down Mode
GENERAL DESCRIPTION
The ADF4210/ADF4211/ADF4212/ADF4213 is a dual frequency
synthesizer that can be used to implement local oscillators (LO)
in the upconversion and downconversion sections of wireless
receivers and transmitters. They can provide the LO for both
the RF and IF sections. They consist of a low-noise digital PFD
(Phase Frequency Detector), a precision charge pump, a pro-
grammable reference divider, programmable A and B Counters
and a dual-modulus prescaler (P/P + 1). The A (6-bit) and B
(12-bit) counters, in conjunction with the dual modulus prescaler
(P/P + 1), implement an N divider (N = BP + A). In addition,
the 14-bit reference counter (R Counter), allows selectable
REFIN frequencies at the PFD input. A complete PLL (Phase-
Locked Loop) can be implemented if the synthesizer is used with
an external loop filter and VCO (Voltage Controlled Oscillators).
APPLICATIONS
Base Stations for Wireless Radio (GSM, PCS, DCS,
CDMA, WCDMA)
Wireless Handsets (GSM, PCS, DCS, CDMA, WCDMA)
Control of all the on-chip registers is via a simple 3-wire interface.
The devices operate with a power supply ranging from 2.7 V to
5 V and can be powered down when not in use.
Wireless LANS
Communications Test Equipment
CATV Equipment
FUNCTIONAL BLOCK DIAGRAM
VDD1 VDD2 VP1 VP2
RSET
IFIN
REFIN
CLOCK
DATA
LE
RFIN
IF
PRESCALER
OSCILLATOR
24-BIT
DATA SDOUT
REGISTER
RF
PRESCALER
12-BIT IF
B-COUNTER
8-BIT IF
A-COUNTER
14-BIT IF
R-COUNTER
PHASE
COMPARATOR
REFERENCE
CHARGE
PUMP
CPIF
IF
LOCK
DETECT
IF CURRENT
SETTING
IFCP3 IFCP2 IFCP1
OUTPUT
MUX
MUXOUT
14-BIT RF
R-COUNTER
12-BIT RF
B-COUNTER
6-BIT RF
A-COUNTER
RF
LOCK
DETECT
RFCP3 RFCP2 RFCP1
IF CURRENT
SETTING
PHASE
COMPARATOR
CHARGE
PUMP
REFERENCE
ADF4210/ADF4211/
ADF4212/ADF4213
RSET
FLO SWITCH
CPRF
FLO
REV. A
DGNDRF
AGNDRF DGNDIF DGNDIF
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
AGNDIF
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001


ADF4211 데이터시트, 핀배열, 회로
ADF4210/ADF4211/ADF4212/ADF4213–SPECIFICATIONS1
(VDD1 = VDD2 = 3 V ؎ 10%, 5 V ؎ 10%; VDD1, VDD2 VP1, VP2 6.0 V ; AGNDRF = DGNDRF = AGNDIF = DGNDIF = 0 V; RSET = 2.7 kdBm to 50 ;
TA = TMIN to TMAX unless otherwise noted.)
Parameter
B Version
B Chips2
Unit
Test Conditions/Comments
RF/IF CHARACTERISTICS (3 V)
RF Input Frequency (RFIN)
ADF4210
ADF4211
ADF4212
ADF4213
RF Input Sensitivity
IF Input Frequency (IFIN)
ADF4210
ADF4211
ADF4212
ADF4213
IF Input Sensitivity
Maximum Allowable
Prescaler Output Frequency3
0.1/1.2
0.1/2.0
0.15/2.7
0.2/3.0
–10/0
60/550
60/550
0.06/1.0
0.06/1.0
–10/0
165
0.1/1.2
0.1/2.0
0.15/2.7
0.2/3.0
–10/0
60/550
60/550
0.06/1.0
0.06/1.0
–10/0
165
GHz min/max
GHz min/max
GHz min/max
GHz min/max
dBm min/max
See Figure 3 for Input Circuit.
Use a square wave for frequencies lower than FMIN.
MHz min/max
MHz min/max
GHz min/max
GHz min/max
dBm min/max
MHz max
RF/IF CHARACTERISTICS (5 V)
RF Input Frequency (RFIN)
ADF4210
ADF4211
ADF4212
ADF4213
RF Input Sensitivity
IF Input Frequency (IFIN)
ADF4210
ADF4211
ADF4212
ADF4213
IF Input Sensitivity
Maximum Allowable
Prescaler Output Frequency3
0.18/1.2
0.18/2.0
0.2/2.3
0.2/2.5
–5/0
100/550
100/550
0.1/1.0
0.1/1.0
–5/0
200
0.18/1.2
0.18/2.0
0.2/2.3
0.2/2.5
–5/0
100/550
100/550
0.1/1.0
0.1/1.0
–5/0
200
GHz min/max
GHz min/max
GHz min/max
GHz min/max
dBm min/max
See Figure 3 for Input Circuit.
Use a square wave for frequencies lower than FMIN.
MHz min/max
MHz min/max
GHz min/max
GHz min/max
dBm min/max
MHz max
REFIN CHARACTERISTICS
REFIN Input Frequency
REFIN Input Sensitivity4
REFIN Input Capacitance
REFIN Input Current
0/115
–5/0
10
± 100
0/115
–5/0
10
± 100
MHz min/max
dBm min/max
pF max
µA max
See Figure 2 for Input Circuit.
For F < 5 MHz, use dc-coupled square wave
(0 to VDD ).
AC-Coupled. When dc-coupled, 0 to VDD max
(CMOS-Compatible)
PHASE DETECTOR
Phase Detector Frequency5
55 55 MHz max
CHARGE PUMP
ICP Sink/Source
High Value
Low Value
Absolute Accuracy
RSET Range
ICP Three-State Leakage Current
Sink and Source Current Matching
ICP vs. VCP
ICP vs. Temperature
5
625
3
1.5/5.6
1
2
2
2
5
625
3
1.5/5.6
1
2
2
2
mA typ
µA typ
% typ
k, min/max
nA typ
% typ
% typ
% typ
Programmable: See Table V
With RSET = 2.7 k
With RSET = 2.7 k
0.5 V Յ VCP Յ VP – 0.5 V
0.5 V Յ VCP Յ VP – 0.5 V
VCP = VP/2
LOGIC INPUTS
VINH, Input High Voltage
VINL, Input Low Voltage
IINH/IINL, Input Current
CIN, Input Capacitance
LOGIC OUTPUTS
VOH, Output High Voltage
VOL, Output Low Voltage
0.8 × DVDD
0.2 × DVDD
±1
10
0.8 × DVDD
0.2 × DVDD
±1
10
V min
V max
µA max
pF max
DVDD – 0.4
0.4
DVDD – 0.4
0.4
V min
V max
IOH = 500 µA
IOL = 500 µA
–2– REV. A




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