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GSM/DCS1800/PCS1900 Baseband Processing Chipset



Analog Devices 로고
Analog Devices
AD20MSP415 데이터시트, 핀배열, 회로
a
GSM/DCS1800/PCS1900
Baseband Processing Chipset
AD20msp415
FEATURES
Complete Baseband Processing Chipset Performs:
Speech Coding/Decoding (GSM 06.XX)
Channel Coding/Decoding (GSM 05.03)
Equalization with 16-State Viterbi, Soft Decision
All ADC and DAC Interface Functions
Includes All Radio, Auxiliary and Voice Interfaces
Support for GSM Data Services
Embedded 16-Bit Microcontroller
Embedded 16-Bit DSP
Integrated SIM and Keyboard Interface
Interface to AD6430 GSM RF Chipset
Interface to EFR Coprocessor
JTAG Boundary Scan
Layer 1 Software Provided with Chipset
Software Compatible with AD20msp410
Full Phase 2 Protocol Stack Software Available
Full Reference Design Available for
Baseband Section and Radio Section
Ultralow Power Design
2.7 V to 3.3 V Operating Voltage
Intelligent Power Management Features
XXX mW Power Dissipation in Talk Mode
XX mW Power Dissipation in Standby Mode
Two TQFP Devices, Occupying Less than 7.5 cm2
APPLICATIONS
GSM/DCS1800/PCS1900 Mobile Radios
GENERAL DESCRIPTION
The Analog Devices GSM Baseband Processing Chipset provides
a competitive solution for GSM based Mobile Radio Systems.
It is designed to be fully integrated, easy to use, and compat-
ible with a wide range of product solutions. Examples are
GSM900, DCS1800, PCS1900 handsets and PCMCIA data
cards. The AD20msp415 is the higher integrated successor of
the AD20msp410 chipset, which passed European GSM Type
Approval in June, 1996.
The chipset consists of two highly integrated, sub-micron, low
power CMOS components that perform the entire baseband
signal processing of the GSM handset. The system architecture
is designed to be easily integrated into current designs and form
the basis for next generation designs.
The chipset uses an operating supply voltage of 2.7 V to 3.3 V
which, coupled with the extensive power management features,
significantly reduces the drain on battery power and extends the
handsets talk time and standby time.
SYSTEM ARCHITECTURE
256K 16
ROM
128K 8
RAM
DISPLAY
2K 8
EEPROM
KEYPAD
AD20msp415
VOICEBAND/
BASEBAND
CODEC
AD6421
GSM
PROCESSOR
AD6422
RADIO
SIM
DATA
TERMINAL
ADAPTER
CHIPSET COMPONENTS
GSM Processor (GSMP)
The AD6422 combines application specific hardware, an em-
bedded 16-bit DSP and an embedded 16-bit microcontroller
(Hitachi H8/300H). It performs channel coding and decoding
and executes the protocol stack and user software. The DSP
implements full rate speech transcoding according to GSM
specifications, including Discontinuous Transmission (DTX)
and Comfort Noise Insertion (CNI). A high performance soft-
decision Viterbi equalizer is also implemented in software em-
bedded in the DSP. The embedded microcontroller executes
the Layer 1, 2, 3 and user MMI software. The required Layer 1
software is supplied with the chipset. To ensure minimum power
consumption, the GSMP has been designed to control all the
power-down functions of the other components in the handset.
Voiceband/Baseband Converter (VBC)
The AD6421 performs the voiceband and baseband analog-to-
digital and digital-to-analog conversions, interfacing the digital
sections of the chipset to the microphone, loudspeaker and radio
section. In addition, the VBC contains all the auxiliary convert-
ers for burst-ramping, AFC, AGC, battery and temperature
monitoring. The chipset interfaces directly with the radio and
supplies all the synthesizer and timing control signals required
to support two synthesizers and a variety of radio architectures
including the AD6450 GSM RF-Chipset.
Software
The required Layer 1 software is supplied with the chipset. In
addition, an object code license is available for Layers 2 and 3 of
the protocol stack.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1997


AD20MSP415 데이터시트, 핀배열, 회로
AD20msp415
ARCHITECTURE OVERVIEW
Analog Devices and The Technology Partnership (TTP) pro-
vide a cost effective and proven method of attaining the baseband
processing subsystem and protocol stack software. This data
sheet includes functional descriptions of the baseband process-
ing subsystem and the Protocol Stack Layer 1. The Technology
Partnership can provide licenses to software and reference de-
signs in all areas of a GSM handportable terminal.
For detailed information about the individual chipset compo-
nents, please refer to the AD6421 (VBC) and AD6422 (GSMP)
data sheets for electrical characteristics and timing information.
FUNCTIONAL DESCRIPTION
Figure 1 is a functional block diagram of the GSM baseband
processing chipset. The chipset can be viewed as a functional
block that contains a number of discrete functional units. The
electrical and functional interfaces to the rest of the system are
briefly described at the end of this section and described in
detail in the individual data sheets for each component.
VBC
GSMP
VOICE
ADC
SPEECH CHANNEL
ENCODE ENCODE
INTER-
LEAVE
ENCRYPT
BASEBAND
DAC
VOICE
DAC
SPEECH
DECODE
CHANNEL
DECODE
DEINTER-
LEAVE
DECRYPT
EQUALIZER
BASEBAND
ADC
CONTROL + MMI + I/O
Figure 1. Functional Block Diagram
Uplink
The uplink baseband processing functions include the following
operations:
Analog-to-Digital Voice Conversion (VBC)
A conventional microphone, connected directly to the VBC,
provides an analog input signal to the ADC. The analog voice
signal is sampled at 8 kHz, producing 13-bit linear values corre-
sponding to the magnitude of the input. The ADC includes all
required filtering to meet the GSM specifications. The sampled
voice data is passed to the GSMP through a dedicated serial
port.
Speech Encoding (GSMP)
The GSMP receives the voice data stream from the VBC and
encodes the data from 104 kb/s to 13 kb/s. The algorithm used is
Regular Pulse Excitation, with Long Term Prediction (RPE-
LTP) as specified in the 06-series of GSM Recommendations.
Channel Coding (GSMP)
The information received from the speech coder contains param-
eters that have different levels of priority. These are protected to
different levels within the channel coding. The encode protec-
tion process incorporates block coding and convolutional
encoding. In addition to the normal speech traffic channels, the
channel coding function also supports data transmission at full
rate and half rate. After the interleave process (if necessary) the
data is encrypted using the required A5/1 or A5/2 encryption
algorithm. Data is then formatted into bursts, with the required
timing and training sequences, and sent to the VBC through a
dedicated serial port.
GMSK Modulation and D/A Conversion (VBC)
The VBC receives data at 270 kb/s. The VBC uses an on-chip
lookup table to perform GMSK modulation. A pair of 10-bit
matched differential DACs convert the modulated data and pass
I and Q analog data to the transmit section of the radio subsystem.
Downlink
The downlink baseband processing functions include the follow-
ing operations:
Analog-to-Digital Conversion (VBC)
The receiver I and Q signals are sampled by a pair of ADCs at
270 kHz. The I and Q samples are transferred to the GSMP
through a dedicated receive path serial port.
Equalization (GSMP)
The equalizer recovers and demodulates the received signal and
establishes local timing and frequency references for the mobile
unit as well as RSSI calculation. The equalization algorithm is a
version of the Maximum Likelihood Sequence Estimation (MLSE)
using the Viterbi algorithm. Two confidence bits per symbol
provide additional information about the accuracy of each deci-
sion to the channel codec’s convolutional decoder. The equal-
izer outputs a sequence of bits including the confidence bits.
Channel Decoding (GSMP)
Data is decrypted as required, using the A5/1 or A5/2 decryption
algorithm prior to the deinterleave process. The deinterleave
process is an exact inversion of the interleave process used by
the transmit section. The decode function then performs convo-
lutional decoding and parity check. The convolutional decoder
uses a Viterbi algorithm, with two soft decision confidence bits
supplied by the equalizer. Error control mechanisms are used to
ensure adequate bad frame indication.
Speech Decoding (GSMP)
Encoded speech data is transferred at 20 ms intervals in blocks
of 260 bits plus the Bad Frame Indicator (BFI). The speech
decoder supports a Comfort Noise Insertion (CNI) function
that inserts a predefined silence descriptor into the decoding
process. The GSMP also implements control of talker side-tone
and short term echo cancellation. The resulting data, at 104 kb/s,
is transferred to the VBC through a dedicated serial path.
Voice Digital-to-Analog Conversion (VBC)
The Voice DAC function of the VBC operates at 8 kHz and
includes all the needed filtering. The analog signal can be con-
trolled in volume and directly drive a small earpiece as well as a
separate auxiliary output.
–2– REV. 0




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