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PDF AD645 Data sheet ( Hoja de datos )
| Número de pieza | AD645 | |
| Descripción | Low Noise/ Low Drift FET Op Amp | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de AD645 (archivo pdf) en la parte inferior de esta página. Total 8 Páginas | ||
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a
Low Noise, Low Drift
FET Op Amp
AD645
FEATURES
Improved Replacement for Burr-Brown
OPA-111 and OPA-121 Op Amp
LOW NOISE
2 V p-p max, 0.1 Hz to 10 Hz
10 nV/√Hz max at 10 kHz
11 fA p-p Current Noise 0.1
HIGH DC ACCURACY
250 V max Offset Voltage
Hz
to
10
HIMz PRDORVIEFDT
1 V/؇C max Drift
1.5 pA max Input Bias Current
114 dB Open-Loop Gain
Available in Plastic Mini-DIP, 8-Pin Header Packages, or
Chip Form
APPLICATIONS
Low Noise Photodiode Preamps
CT Scanners
Precision I-V Converters
PRODUCT DESCRIPTION
The AD645 is a low noise, precision FET input op amp. It of-
fers the pico amp level input currents of a FET input device
coupled with offset drift and input voltage noise comparable to a
high performance bipolar input amplifier.
The AD645 has been improved to offer the lowest offset drift in
a FET op amp, 1 µV/°C. Offset voltage drift is measured and
trimmed at wafer level for the lowest cost possible. An inher-
ently low noise architecture and advanced manufacturing tech-
niques result in a device with a guaranteed low input voltage
noise of 2 µV p-p, 0.1 Hz to 10 Hz. This level of dc performance
along with low input currents make the AD645 an excellent
choice for high impedance applications where stability is of
prime concern.
1k
100
10
1.0
1 10 100 1k 10k
FREQUENCY – Hz
Figure 1. AD645 Voltage Noise Spectral Density vs.
Frequency
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
CONNECTION DIAGRAMS
8-Pin Plastic Mini-DIP
(N) Package
TO-99 (H) Package
CASE
OFFSET 1
NULL
–IN 2
AD645
8 NC
7 +VS
+IN 3
6 OUTPUT
–VS
4
TOP VIEW
5 OFFSET
NULL
NC = NO CONNECT
OFFSET
NULL 1
8
+V
7
– IN 2
6 OUTPUT
3 AD645 5
+IN 4 OFFSET
NULL
–V
NOTE: CASE IS CONNECTED
TO PIN 8
The AD645 is available in six performance grades. The AD645J
and AD645K are rated over the commercial temperature range
of 0°C to +70°C. The AD645A, AD645B, and the ultra-
precision AD645C are rated over the industrial temperature
range of –40°C to +85°C. The AD645S is rated over the military
temperature range of –55°C to +125°C and is available
processed to MIL-STD-883B.
The AD645 is available in an 8-pin plastic mini-DIP, 8-pin
header, or in die form.
PRODUCT HIGHLIGHTS
1. Guaranteed and tested low frequency noise of 2 µV p-p max
and 20 nV/√Hz at 100 Hz makes the AD645C ideal for low
noise applications where a FET input op amp is needed.
2. Low VOS drift of 1 µV/°C max makes the AD645C an excel-
lent choice for applications requiring ultimate stability.
3. Low input bias current and current noise (11 fA p-p 0.1 Hz to
10 Hz) allow the AD645 to be used as a high precision
preamp for current output sensors such as photodiodes, or as
a buffer for high source impedance voltage output sensors.
30
25
20
15
10
5
0
–2.5 –2.0 –1.5 –1.0 –0.5 0.0 0.5 1.0 1.5 2.0 2.5
INPUT OFFSET VOLTAGE DRIFT– µV/°C
Figure 2. Typical Distribution of Average Input Offset
Voltage Drift (196 Units)
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703
1 page  
10
TA = +25°C
VS = ±15V
H PACKAGE
1.0
0.1
–20
–15 –10 –5 0 5 10
COMMON MODE VOLTAGE – Volts
15
Figure 16. Input Bias Current vs.
Common-Mode Voltage
120
100
+ PSRR
80
– PSRR
60
40
20
0
1 10 100 1k 10k 100k 1M 10M
FREQUENCY – Hz
Figure 17. Power Supply Rejection
vs. Frequency
AD645
120
100
80
60
40
20
0
1 10 100 1k 10k 100k 1M 10M
FREQUENCY – Hz
Figure 18. Common-Mode
Rejection vs. Frequency
120
110
100
90
80
70
– 15
– 10 – 5 0 5 10
COMMON MODE VOLTAGE – Volts
15
Figure 19. Common-Mode
Rejection vs. Input Common-Mode
Voltage
4.0
4.0
3.0
SLEW RATE
3.0
2.0
GAIN-BANDWIDTH
2.0
1.0
0
5 10 15
SUPPLY VOLTAGE – ±Volts
20
Figure 22. Gain-Bandwidth and
Slew Rate vs. Supply Voltage
110 – 45
100
PHASE
80 –90
60
GAIN
40 –135
20
0 –180
– 20
10
100
1k 10k 100k
FREQUENCY – Hz
1M
10M
Figure 20. Open-Loop Gain and
Phase Shift vs. Frequency
160
150
VS = ±15V
VO = ±10V
RL = 2kΩ
140
130
120
110
100
– 60 – 40 – 20
0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 23. Open-Loop Gain vs.
Temperature
3.0 4.0
2.0 3.0
SLEW RATE
1.0 GAIN-BANDWIDTH
2.0
0
– 60 –40 –20
1.0
0 20 40 60 80 100 120 140
TEMPERATURE – ؇C
Figure 21. Gain-Bandwidth Product
and Slew Rate vs. Temperature
35
30
25
20
15
10
5
0
1k 10k 100k 1M
FREQUENCY – Hz
Figure 24. Large Signal Frequency
Response
REV. B
–5–
5 Page | ||
| Páginas | Total 8 Páginas | |
| PDF Descargar | [ Datasheet AD645.PDF ] | |
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