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ADM1021 반도체 회로 부품 판매점

Low Cost Microprocessor System Temperature Monitor



Analog Devices 로고
Analog Devices
ADM1021 데이터시트, 핀배열, 회로
a
Low Cost Microprocessor
System Temperature Monitor
ADM1021
FEATURES
Improved Replacement for MAX1617
On-Chip and Remote Temperature Sensing
No Calibration Necessary
1؇C Accuracy for On-Chip Sensor
3؇C Accuracy for Remote Sensor
Programmable Over/Under Temperature Limits
Programmable Conversion Rate
2-Wire SMBus Serial Interface
Supports System Management Bus (SMBus™) Alert
70 A Max Operating Current
3 A Standby Current
3 V to 5.5 V Supply
Small 16-Lead QSOP Package
APPLICATIONS
Desktop Computers
Notebook Computers
Smart Batteries
Industrial Controllers
Telecomms Equipment
Instrumentation
PRODUCT DESCRIPTION
The ADM1021 is a two-channel digital thermometer and under/
over temperature alarm, intended for use in personal computers
and other systems requiring thermal monitoring and manage-
ment. The device can measure the temperature of a micropro-
cessor using a diode-connected PNP transistor, which may be
provided on-chip in the case of the Pentium® II or similar pro-
cessors, or can be a low cost discrete NPN/PNP device such as
the 2N3904/2N3906. A novel measurement technique cancels
out the absolute value of the transistor’s base emitter voltage, so
that no calibration is required. The second measurement chan-
nel measures the output of an on-chip temperature sensor, to
monitor the temperature of the device and its environment.
The ADM1021 communicates over a two-wire serial interface
compatible with SMBus standards. Under and over temperature
limits can be programmed into the devices over the serial bus,
and an ALERT output signals when the on-chip or remote
temperature is out of range. This output can be used as an inter-
rupt, or as an SMBus alert.
FUNCTIONAL BLOCK DIAGRAM
ON-CHIP TEMP.
SENSOR
LOCAL TEMPERATURE
VALUE REGISTER
D+
D–
ANALOG MUX
8-BIT A-TO-D
CONVERTER
BUSY RUN/STANDBY
REMOTE TEMPERATURE
VALUE REGISTER
EXTERNAL DIODE OPEN-CIRCUIT
LOCAL TEMPERATURE
LOW LIMIT COMPARATOR
LOCAL TEMPERATURE
HIGH LIMIT COMPARATOR
REMOTE TEMPERATURE
LOW LIMIT COMPARATOR
REMOTE TEMPERATURE
HIGH LIMIT COMPARATOR
STATUS REGISTER
ADDRESS POINTER
REGISTER
ONE-SHOT
REGISTER
CONVERSION RATE
REGISTER
LOCAL TEMPERATURE
LOW LIMIT REGISTER
LOCAL TEMPERATURE
HIGH LIMIT REGISTER
REMOTE TEMPERATURE
LOW LIMIT REGISTER
REMOTE TEMPERATURE
HIGH LIMIT REGISTER
CONFIGURATION
REGISTER
INTERRUPT
MASKING
STBY
ALERT
ADM1021
SMBUS INTERFACE
TEST VDD NC GND GND NC NC
TEST
SDATA
SCLK
ADD0
ADD1
SMBus is a trademark and Pentium is a registered trademark of Intel Corporation.
REV. 0
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 1998


ADM1021 데이터시트, 핀배열, 회로
ADM1021–SPECIFICATIONS (TA = TMIN to TMAX, VDD = 3.0 V to 3.6 V, unless otherwise noted)
Parameter
Min Typ Max
Units Test Conditions/Comments
POWER SUPPLY AND ADC
Temperature Resolution
Temperature Error, Local Sensor
Temperature Error, Remote Sensor
Supply Voltage Range
Undervoltage Lockout Threshold
Undervoltage Lockout Hysteresis
Power-On Reset Threshold
POR Threshold Hysteresis
Standby Supply Current
Average Operating Supply Current
Auto-Convert Mode, Averaged Over 4 Seconds
Conversion Time
Remote Sensor Source Current
D-Source Voltage
Address Pin Bias Current (ADD0, ADD1)
1
–3
–3
–5
3
2.5
0.9
65
60
3.5
±1
+3
+3
+5
3.6
2.7 2.95
25
1.7 2.2
50
3 10
4
70 90
160 200
115 170
90 130
5.5 8
0.7
50
°C Guaranteed No Missed Codes
°C
°C
°C TA = +60°C to +100°C
°C
V Note 1
V VDD Input, Disables ADC,
Rising Edge
mV
V VDD, Falling Edge2
mV
µA VDD = 3.3 V, No SMBus Activity
µA SCLK at 10 kHz
µA 0.25 Conversions/Sec Rate
µA 2 Conversions/Sec Rate
ms From Stop Bit to Conversion
Complete (Both Channels)
D+ Forced to D– + 0.65 V
µA High Level
µA Low Level
V
µA Momentary at Power-On Reset
SMBUS INTERFACE
Logic Input High Voltage, VIH
STBY, SCLK, SDATA
Logic Input Low Voltage, VIL
STBY, SCLK, SDATA
SMBus Output Low Sink Current
ALERT Output Low Sink Current
Logic Input Current, IIH, IIL
SMBus Input Capacitance, SCLK, SDATA
SMBus Clock Frequency
SMBus Clock Low Time, tLOW
SMBus Clock High Time, tHIGH
SMBus Start Condition Setup Time, tSU:STA
SMBus Repeat Start Condition
Setup Time, tSU:STA
SMBus Start Condition Hold Time, tHD:STA
SMBus Stop Condition Setup Time, tSU:STO
SMBus Data Valid to SCLK
Rising Edge Time, tSU:DAT
SMBus Data Hold Time, tHD:DAT
SMBus Bus Free Time, tBUF
SCLK Falling Edge to SDATA
Valid Time, tVD,DAT
2.2
6
1
–1
5
0
4.7
4
4.7
250
4
4
250
0
4.7
0.8
+1
100
1
V VDD = 3 V to 5.5 V
V VDD = 3 V to 5.5 V
mA SDATA Forced to 0.6 V
mA ALERT Forced to 0.4 V
µA
pF
kHz
µs tLOW Between 10% Points
µs tHIGH Between 90% Points
µs
ns Between 90% and 90% Points
µs Time from 10% of SDATA to
90% of SCLK
µs Time from 90% of SCLK to 10%
of SDATA
ns Time from 10% or 90% of
SDATA to 10% of SCLK
µs
µs Between Start/Stop Condition
µs Master Clocking in Data
NOTES
1Operation at VDD = +5 V guaranteed by design, not production tested.
2Guaranteed by design, not production tested.
Specifications subject to change without notice.
–2– REV. 0




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