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Vishay |
J/SST108 Series
Vishay Siliconix
N–Channel JFETs
J108
J109
J110
PRODUCT SUMMARY
Part Number
J/SST108
J/SST109
J/SST110
VGS(off) (V)
–3 to –10
–2 to –6
–0.5 to –4
rDS(on) Max (W)
8
12
18
ID(off) Typ (pA)
20
20
20
tON Typ (ns)
4
4
4
SST108
SST109
SST110
FEATURES
D Low On-Resistance: J108 <8 W
D Fast Switching—tON: 4 ns
D Low Leakage: 20 pA
D Low Capacitance: 11 pF
D Low Insertion Loss
BENEFITS
D Low Error Voltage
D High-Speed Analog Circuit Performance
D Negligible “Off-Error” Excellent Accuracy
D Good Frequency Response
D Eliminates Additional Buffering
APPLICATIONS
D Analog Switches
D Choppers
D Sample-and-Hold
D Normally “On” Switches
D Current Limiters
DESCRIPTION
The J/SST108 series is designed with high-performance
analog switching applications in mind. It features low
on-resistance, good off-isolation, and fast switching.
The SST108 series is comprised of surface-mount
devices featuring the lowest rDS(on) of any TO-236
(SOT-23) JFET device.
The TO-226AA (TO-92) plastic package provides a
low-cost option. Both the J and SST series are available
in tape-and-reel for automated assembly (see Packaging
Information). For similar products packaged in
TO-206AC (TO-52), see the 2N5432/5433/5434 data
sheet.
TO-226AA
(TO-92)
D1
S2
G3
Top View
J108, J109, J110
TO-236
(SOT-23)
D1
S2
3G
Top View
SST108 (I8)*
SST109 (I9)*
SST110 (I0)*
*Marking Code for TO-236
Document Number: 70231
S-04028—Rev. E, 04-Jun-01
www.vishay.com
7-1
J/SST108 Series
Vishay Siliconix
ABSOLUTE MAXIMUM RATINGS
Gate-Drain, Gate-Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –25 V
Gate Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50 mA
Lead Temperature (1/16” from case for 10 sec.) . . . . . . . . . . . . . . . . . . . 300_C
Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . –55 to 150_C
Operating Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . –55 to 150_C
Power Dissipationa . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 350 mW
Notes
a. Derate 2.8 mW/_C above 25_C
SPECIFICATIONS (TA = 25_C UNLESS OTHERWISE NOTED)
Limits
J/SST108
J/SST109
J/SST110
Parameter
Symbol
Test Conditions
Typa Min Max Min Max Min Max Unit
Static
Gate-Source
Breakdown Voltage
Gate-Source Cutoff Voltage
Saturation Drain Currentb
Gate Reverse Current
Gate Operating Current
Drain Cutoff Current
Drain-Source
On-Resistance
Gate-Source
Forward Voltage
Dynamic
V(BR)GSS
VGS(off)
IDSS
IGSS
IG
ID(off)
rDS(on)
VGS(F)
IG = –1 mA , VDS = 0 V –32 –25 –25 –25
VDS = 5 V, ID = 1 mA
VDS = 15 V, VGS = 0 V
VGS = –15 V, VDS = 0 V
TA = 125_C
VDG = 10 V, ID = 10 mA
VDS = 5 V, VGS = –10 V
TA = 125_C
–0.01
–5
–0.01
0.02
1.0
–3 –10 –2
80 40
–3
3
–6 –0.5 –4
10
–3 –3
33
VGS = 0 V, VDS v 0.1 V
8 12 18
IG = 1 mA , VDS = 0 V
0.7
V
mA
nA
W
V
Common-Source
Forward Transconductance
Common-Source
Output Conductance
Drain-Source
On-Resistance
Common-Source
Input Capacitance
Common-Source Reverse
Transfer Capacitance
Equivalent Input
Noise Voltage
Switching
gfs
gos
rds(on)
Ciss
Crss
en
VDS = 5 V, ID = 10 mA, f = 1 kHz
VGS = 0 V, ID = 0 mA , f = 1 kHz
VDS = 0 V
VGS = 0 V
f = 1 MHz
SST
J Series
VDS = 0 V
VGS = –10 V
f = 1 MHz
SST
J Series
VDG = 5 V, ID = 10 mA
f = 1 kHz
17
0.6
60
60
11
11
3.5
mS
8 12 18 W
85 85 85
pF
15 15 15
nV⁄
√Hz
Turn-On Time
Turn-Off Time
td(on)
tr
td(off)
tf
VDD = 1.5 V, VGS(H) = 0 V
See Switching Diagram
3
1
4
18
Notes
a. Typical values are for DESIGN AID ONLY, not guaranteed nor subject to production testing.
b. Pulse test: PW v300 ms duty cycle v3%.
ns
NIP
www.vishay.com
7-2
Document Number: 70231
S-04028—Rev. E, 04-Jun-01
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