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PDF AD5263 Data sheet ( Hoja de datos )
| Número de pieza | AD5263 | |
| Descripción | Quad 15V 256-Position Digital Potentiometer | |
| Fabricantes | Analog Devices | |
| Logotipo |  |
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Data Sheet
Quad, 15 V, 256-Position, Digital
Potentiometer with Pin-Selectable SPI/I2C
AD5263
FEATURES
256-position, 4-channel
End-to-end resistance 20 kΩ, 50 kΩ, 200 kΩ
Pin-selectable SPI®- or I2C®-compatible interface
Power-on preset to midscale
Two package address decode pins AD0 and AD1
Rheostat mode temperature coefficient 30 ppm/°C
Voltage divider temperature coefficient 5 ppm/°C
Wide operating temperature range –40°C to +125°C
10 V to 15 V single supply; ±5 V dual supply
APPLICATIONS
Mechanical potentiometer replacement
Optical network adjustment
Instrumentation: gain, offset adjustment
Stereo channel audio level control
Automotive electronics adjustment
Programmable power supply
Programmable filters, delays, time constants
Line impedance matching
Low resolution DAC/trimmer replacement
Base station power amp biasing
Sensor calibration
VDD
VSS
SHDN
RES/AD1
FUNCTIONAL BLOCK DIAGRAM
A1 W1 B1 A2 W2 B2 A3 W3 B3 A4 W4 B4
RDAC 1
REGISTER
RDAC 2
REGISTER
RDAC 3
REGISTER
RDAC 4
REGISTER
VL
CLK/SCL
SDI/SDA
CS/AD0
GND
ADDRESS
DECODER
SPI/I2C
SELECT
LOGIC
8
SERIAL INPUT
REGISTER
AD5263
DIS NC/O2 SDO/O1
Figure 1.
GENERAL DESCRIPTION
The AD5263 is the industry’s first quad-channel, 256-position,
digital potentiometer1 with a selectable digital interface. This
device performs the same electronic adjustment function as
mechanical potentiometers or variable resistors, with enhanced
resolution, solid-state reliability, and superior low temperature
coefficient performance.
Each channel of the AD5263 offers a completely programmable
value of resistance between the A terminal and the wiper or
between the B terminal and the wiper. The fixed A-to-B
terminal resistance of 20 kΩ, 50 kΩ, or 200 kΩ has a nominal
temperature coefficient of ±30 ppm/°C and a ±1% channel-to-
channel matching tolerance. Another key feature of this part is
the ability to operate from +4.5 V to +15 V, or at ±5 V.
Wiper position programming presets to midscale upon power-
on. Once powered, the VR wiper position is programmed by
either the 3-wire SPI or 2-wire I2C-compatible interface. In the
I2C mode, additional programmable logic outputs enable users
to drive digital loads, logic gates, and analog switches in their
systems.
The AD5263 is available in a narrow body, 24-lead TSSOP.
All parts are guaranteed to operate over the automotive
temperature range of –40°C to +125°C.
For single- or dual-channel applications, refer to the
AD5260/AD5280 or AD5262/AD5282 data sheets.
1 The terms digital potentiometer, VR, and RDAC are used interchangeably.
Rev. F
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©2003–2012 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
1 page  
AD5263
Data Sheet
Parameter
POWER SUPPLIES
Logic Supply8
Power Single-Supply Range
Power Dual-Supply Range
Logic Supply Current9
Positive Supply Current
Negative Supply Current
Power Dissipation10
Power Supply Sensitivity
DYNAMIC CHARACTERISTICS6, 11
Bandwidth (3 dB)
Total Harmonic Distortion
VW Settling Time12
Resistor Noise Voltage
Symbol Conditions
Min
VL
VDD RANGE
VDD/SS RANGE
IL
IDD
ISS
PDISS
PSS
VSS = 0 V
VL = +5 V
VIH = +5 V or VIL = 0 V
VSS = –5 V
VIH = +5 V or VIL = 0 V, VDD =
+5 V, VSS = –5 V
∆VDD = +5 V ± 10%
2.7
4.5
±4.5
BW
THDW
tS
eN_WB
RAB = 20 kΩ/50 kΩ/200 kΩ
VA = 1 V rms, VB = 0 V, f = 1 kHz,
RAB = 20 kΩ
VA = 10 V, VB = 0 V, ±1 LSB error
band
RWB = 10 kΩ, f = 1 kHz, RS = 0
Typ 1
25
0.002
300/150/35
0.05
2
9
Max
5.5
16.5
±7.5
60
1
1
0.6
0.01
Unit
V
V
V
µA
µA
µA
mW
%/%
kHz
%
µs
nV/√Hz
1 Typicals represent average readings at +25°C and VDD = +5 V, VSS = −5 V.
2 Resistor position nonlinearity error (R-INL) is the deviation from an ideal value measured between the maximum resistance and the minimum resistance wiper
positions. R-DNL measures the relative step change from ideal between successive tap positions. Parts are guaranteed monotonic. IW = VDD/R for both VDD = +5 V and
VSS = –5 V.
3 VAB = VDD, Wiper (VW) = no connect.
4 INL and DNL are measured at VW with the RDAC configured as a potentiometer divider similar to a voltage output DAC. VA = VDD and VB = 0 V. DNL specification limits
of ±1 LSB maximum are guaranteed monotonic operating conditions.
5 The A, B, and W resistor terminals have no limitations on polarity with respect to each other.
6 Guaranteed by design and not subject to production test.
7 Measured at the Ax terminals. All Ax terminals are open-circuited in shutdown mode.
8 VL is limited to VDD or 5.5 V, whichever is less.
9 Worst-case supply current consumed when all logic-input levels set at 2.4 V, standard characteristic of CMOS logic.
10 PDISS is calculated from IDD × VDD. CMOS logic level inputs result in minimum power dissipation.
11 All dynamic characteristics use VDD = +5 V, VSS = −5 V, VL = +5 V.
12 Settling time depends on value of VDD, RL, and CL.
Rev. F | Page 4 of 28
5 Page 
AD5263
27
26
VDD/VSS = +15/0V
25
VDD/VSS = ±5V
24
23
22
–40
0 40 80
TEMPERATURE (°C)
Figure 15. ILOGIC vs. Temperature
120
85
80
RON @ VDD/VSS = +5/0V
75
70
RON @ VDD/VSS = ±5V
65
60
RON @ VDD/VSS = +15/0V
55
50
45
–5
0
5 10
VBIAS (V)
Figure 16. Wiper On-Resistance vs. Bias Voltage
15
700
20kΩ
500
50kΩ
200kΩ
300
100
–100
–300
–500
–700
0
32 64 96 128 160 192 224
CODE (Decimal)
Figure 17. Rheostat Mode Tempco ∆RWB/∆T vs. Code
256
Data Sheet
150
20kΩ
100 50kΩ
200kΩ
50
0
–50
–100
–150
–200
–250
0 32 64 96 128 160 192 224 256
CODE (Decimal)
Figure 18. Potentiometer Mode Tempco ∆RWB/∆T vs. Code
0
0x80
–6
0x40
–12
0x20
–18
0x10
–24
0x08
–30
0x04
–36
0x02
–42
–48
–54
–60
1k
0x01
10k
TA = 25°C
VA = 50mV rms
VDD/VSS = ±5V
100k
1M
FREQUENCY (Hz)
Figure 19. Gain vs. Frequency vs. Code; RAB = 20 kΩ
0
0x80
–6
0x40
–12
0x20
–18
0x10
–24
0x08
–30
0x04
–36
0x02
–42
0x01
–48
–54
–60
1k
TA = 25°C
VA = 50mV rms
VDD/VSS = ±5V
10k 100k
FREQUENCY (Hz)
1M
Figure 20. Gain vs. Frequency vs. Code; RAB = 50 kΩ
Rev. F | Page 10 of 28
11 Page | ||
| Páginas | Total 29 Páginas | |
| PDF Descargar | [ Datasheet AD5263.PDF ] | |
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