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AD8115 반도체 회로 부품 판매점

16 x 16 Crosspoint Switches



Analog Devices 로고
Analog Devices
AD8115 데이터시트, 핀배열, 회로
Data Sheet
FEATURES
16 × 16 high speed nonblocking switch arrays
AD8114; G = 1
AD8115; G = 2
Serial or parallel programming of switch array
Serial data out allows daisy-chaining of multiple
16 × 16 arrays to create larger switch arrays
High impedance output disable allows connection of
multiple devices without loading the output bus
For smaller arrays see the AD8108/AD8109 (8 × 8) or
AD8110/AD8111 (16 × 8) switch arrays
Complete solution
Buffered inputs
Programmable high impedance outputs
16 output amplifiers, AD8114 (G = 1), AD8115 (G = 2)
Drives 150 Ω loads
Excellent video performance
25 MHz, 0.1 dB gain flatness
0.05%/0.05° differential gain/differential phase error
(RL = 150 Ω)
Excellent ac performance
−3 dB bandwidth: 225 MHz
Slew rate: 375 V/µs
Low power of 700 mW (2.75 mW per point)
Low all hostile crosstalk of −70 dB at 5 MHz
Reset pin allows disabling of all outputs (connected through
a capacitor to ground provides power-on reset capability)
100-lead LQFP (14 mm × 14 mm)
APPLICATIONS
Routing of high speed signals, including
Video (NTSC, PAL, S, SECAM, YUV, RGB)
Compressed video (MPEG, wavelet)
3-level digital video (HDB3)
Data communications
Telecommunications
GENERAL DESCRIPTION
The AD8114/AD8115 are high speed, 16 × 16 video crosspoint
switch matrices. They offer a −3 dB signal bandwidth greater than
200 MHz and channel switch times of less than 50 ns with 1%
settling. With −70 dB of crosstalk and −98 dB isolation (at 5 MHz),
the AD8114/AD8115 are useful in many high speed applications.
Low Cost, 225 MHz,
16 × 16 Crosspoint Switches
AD8114/AD8115
FUNCTIONAL BLOCK DIAGRAM
SER/PAR D0 D1 D2 D3 D4
CLK
DATA IN
UPDATE
CE
RESET
80-BIT SHIFT REGISTER
WITH 5-BIT
PARALLEL LOADING
A0
A1
A2
A3
DATA
OUT
80
PARALLEL LATCH
80
DECODE
16 × 5:16 DECODERS
SET
INDIVIDUAL
OR RESET
ALL OUTPUTS
TO "OFF"
16
AD8114/AD8115
OUTPUT
256 BUFFER
G = +1,
G = +2
16 INPUTS
SWITCH
MATRIX
16
OUTPUTS
Figure 1.
The differential gain and differential phase of better than 0.05%
and 0.05°, respectively, along with a 0.1 dB flatness out to 25 MHz
while driving a 75 Ω back-terminated load, make the AD8114/
AD8115 ideal for all types of signal switching.
The AD8114/AD8115 include 16 independent output buffers
that can be placed into a high impedance state for paralleling
crosspoint outputs so that off channels do not load the output bus.
The AD8114 has a gain of 1, while the AD8115 offers a gain of 2.
They operate on voltage supplies of ±5 V while consuming only
70 mA of idle current. The channel switching is performed via a
serial digital control (which can accommodate daisy-chaining of
several devices) or via a parallel control, allowing updating of an
individual output without reprogramming the entire array.
The AD8114/AD8115 is packaged in a 100-lead LQFP and is
available over the extended industrial temperature range of
−40°C to +85°C.
Rev. C
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700 ©1998–2016 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com


AD8115 데이터시트, 핀배열, 회로
AD8114/AD8115
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 2
Specifications..................................................................................... 3
Timing Characteristics (Serial) .................................................. 5
Timing Characteristics (Parallel) ............................................... 6
Absolute Maximum Ratings............................................................ 8
Maximum Power Dissipation ..................................................... 8
ESD Caution.................................................................................. 8
Pin Configuration and Function Descriptions............................. 9
REVISION HISTORY
7/2016—Rev. B to Rev. C
Changes to General Description Section ...................................... 1
Changes to Off Isolation, Input-to-Output Parameter, Table 1 ........ 3
Changes to Areas of Crosstalk Section ........................................ 22
Deleted PCB Layout Section and Figure 50; Renumbered
Sequentially ..................................................................................... 25
Updated Outline Dimensions ....................................................... 25
Changes to Ordering Guide .......................................................... 25
Deleted Figure 51 and Figure 52................................................... 26
Deleted Figure 53 and Figure 54................................................... 27
Deleted Figure 55 and Figure 56................................................... 28
Deleted Evaluation Board Section and Figure 57....................... 29
Deleted Control the Evaluation Board from a PC Section,
Figure 58, Overshoot of PC Printer Ports’ Data Lines Section,
and Figure 59................................................................................... 30
Data Sheet
Typical Performance Characteristics ........................................... 11
Input/Output Schematics .............................................................. 17
Theory of Operation ...................................................................... 18
Applications ................................................................................ 18
Power-On Reset.......................................................................... 19
Gain Selection............................................................................. 19
Creating Larger Crosspoint Arrays.......................................... 19
Multichannel Video ................................................................... 21
Crosstalk ...................................................................................... 21
Outline Dimensions ....................................................................... 24
Ordering Guide .......................................................................... 24
9/2005—Rev. A to Rev. B
Updated Format..................................................................Universal
Change to Figure 3 ............................................................................6
Change to Absolute Maximum Ratings .........................................8
Changes to Maximum Power Dissipation Section........................8
Updated Outline Dimensions....................................................... 31
Changes to Ordering Guide .......................................................... 31
11/2001—Rev. 0 to Rev. A
Changes to Ordering Guide .............................................................5
Updated Outline Dimensions....................................................... 26
10/1998—Revision 0: Initial Version
Rev. C | Page 2 of 25




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