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Supertex |
– OBSOLETE – DN2640
Preliminary
N-Channel Depletion-Mode
Vertical DMOS FETs
Ordering Information
BVDSX /
BVDGX
400V
RDS(ON)
(max)
6.0Ω
IDSS
(min)
300mA
Order Number / Package
TO-92
Die
DN2640N3 DN2640ND
Features
High input impedance
Low input capacitance
Fast switching speeds
Low on resistance
Free from secondary breakdown
Low input and output leakage
Applications
Normally-on switches
Solid state relays
Converters
Linear amplifiers
Constant current sources
Power supply circuits
Telecom
Absolute Maximum Ratings
Drain-to-Source Voltage
Drain-to-Gate Voltage
Gate-to-Source Voltage
BVDSX
BVDGX
± 20V
Operating and Storage Temperature
-55°C to +150°C
Soldering Temperature*
* Distance of 1.6 mm from case for 10 seconds.
300°C
Advanced DMOS Technology
These depletion-mode (normally-on) transistors utilize an ad-
vanced vertical DMOS structure and Supertex’s well-proven
silicon-gate manufacturing process. This combination produces
devices with the power handling capabilities of bipolar transis-
tors and with the high input impedance and positive temperature
coefficient inherent in MOS devices. Characteristic of all MOS
structures, these devices are free from thermal runaway and
thermally-induced secondary breakdown.
Supertex’s vertical DMOS FETs are ideally suited to a wide range
of switching and amplifying applications where high breakdown
voltage, high input impedance, low input capacitance, and fast
switching speeds are desired.
8
Package Options
SGD
TO-92
Note: See Package Outline section for dimensions.
8-13
Thermal Characteristics
DN2640
Package
ID (continuous)*
ID (pulsed)
Power Dissipation
@ TC = 25°C
θjc
°C/W
θja
°C/W
TO-92
250mA
600mA
1.0W
125
– OBSOLETE –* ID (continuous) is limited by max rated Tj.
Electrical Characteristics (@ 25°C unless otherwise specified)
170
IDR*
250mA
IDRM
600mA
Symbol
BVDSX
VGS(OFF)
∆VGS(OFF)
IGSS
ID(OFF)
Parameter
Drain-to-Source
Breakdown Voltage
Gate-to-Source OFF Voltage
Change in VGS(OFF) with Temperature
Gate Body Leakage Current
Drain-to-Source Leakage Current
Min Typ Max
400
Unit
V
–1.0 –3.5 V
4.5 mV/°C
100 nA
10 µA
1.0 mA
IDSS
RDS(ON)
Saturated Drain-to-Source Current
Static Drain-to-Source
ON-State Resistance
300
mA
6.0 Ω
∆RDS(ON)
GFS
CISS
COSS
CRSS
td(ON)
tr
td(OFF)
tf
VSD
trr
Change in RDS(ON) with Temperature
Forward Transconductance
Input Capacitance
Common Source Output Capacitance
Reverse Transfer Capacitance
Turn-ON Delay Time
Rise Time
Turn-OFF Delay Time
Fall Time
Diode Forward Voltage Drop
Reverse Recovery Time
1.1 %/°C
300 m
750
75 pF
15
15
20 ns
25
25
1.8 V
800 ns
Notes:
1. All D.C. parameters 100% tested at 25°C unless otherwise stated. (Pulse test: 300µs pulse, 2% duty cycle.)
2. All A.C. parameters sample tested.
Conditions
VGS = -5V, ID = 1.0mA
VDS = 25V, ID= 10µA
VDS = 25V, ID= 10µA
VGS = ± 20V, VDS = 0V
VGS = -10V, VDS = Max Rating
VGS = -10V, VDS = 0.8 Max Rating
TA = 125°C
VGS = 0V, VDS = 25V
VGS = 0V, ID = 150mA
VGS = 0V, ID = 150mA
ID = 200mA, VDS = 10V
VGS = -10V, VDS = 25V
f = 1 MHz
VDD = 25V,
ID = 200mA,
RGEN = 10Ω
VGS = -10V, ISD = 200mA
VGS = -10V, ISD = 1.0A
Switching Waveforms and Test Circuit
0V
INPUT
-10V
10%
t(ON)
90%
t(OFF)
td(ON)
tr
td(OFF)
tF
VDD
OUTPUT
0V
10%
90%
10%
90%
PULSE
GENERATOR
Rgen
INPUT
VDD
RL
OUTPUT
D.U.T.
8-14
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