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PDF 25AA02E64 Data sheet ( Hoja de datos )
| Número de pieza | 25AA02E64 | |
| Descripción | EEPROM | |
| Fabricantes | Microchip | |
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25AA02E48/25AA02E64
2K SPI Bus Serial EEPROMs with EUI-48™ or EUI-64™ Node Identity
Device Selection Table
Part Number
25AA02E48
25AA02E64
VCC Range
1.8V-5.5V
1.8V-5.5V
Page Size
16 Bytes
16 Bytes
Features
• Pre-Programmed Globally Unique, 48-bit or 64-bit
Node Address
• Compatible with EUI-48™ and EUI-64™
• 10 MHz Maximum Clock Frequency
• Low-Power CMOS Technology:
- Maximum Write Current: 5 mA at 5.5V
- Read Current: 5 mA at 5.5V, 10 MHz
- Standby Current: 1 µA at 2.5V
• 256 x 8-bit Organization
• Write Page Mode (up to 16 bytes)
• Sequential Read
• Self-Timed Erase and Write Cycles
(5 ms maximum)
• Block Write Protection:
- Protect none, 1/4, 1/2 or all of array
• Built-in Write Protection:
- Power-on/off data protection circuitry
- Write enable latch
- Write-protect pin
• High Reliability:
- Endurance: 1,000,000 erase/write cycles
- Data retention: >200 years
- ESD protection: >4000V
• Temperature Ranges Supported:
- Industrial (I): -40C to +85C
• Pb-Free and RoHS Compliant
Package Types (not to scale)
6-Lead SOT-23
(OT)
SOIC
(SN)
SCK 1
VSS 2
SI 3
6 VDD
5 CS
4 SO
CS 1
SO 2
WP 3
VSS 4
8 VCC
7 HOLD
6 SCK
5 SI
Temp. Ranges
I
I
Packages
SN, OT
SN, OT
Node Address
EUI-48™
EUI-64™
Description
The Microchip Technology Inc.
25AA02E48/25AA02E64 (25AA02EXX) is a 2 Kbit
Serial Electrically Erasable Programmable Read-Only
Memory (EEPROM). The memory is accessed via a
simple Serial Peripheral Interface (SPI) compatible
serial bus. The bus signals required are a clock input
(SCK) plus separate data in (SI) and data out (SO)
lines. Access to the device is controlled through a Chip
Select (CS) input.
Note:
25AA02EXX is used in this document as a
generic part number for the
25AA02E48/25AA02E64 devices.
Communication to the device can be paused via the
hold pin (HOLD). While the device is paused,
transitions on its inputs will be ignored, with the
exception of Chip Select, allowing the host to service
higher priority interrupts.
The 25AA02EXX is available in the standard 8-lead
SOIC and 6-lead SOT-23 packages.
Pin Function Table
Name
Function
CS Chip Select Input
SO Serial Data Output
WP Write-Protect
VSS Ground
SI Serial Data Input
SCK
HOLD
VCC
Serial Clock Input
Hold Input
Supply Voltage
2008-2016 Microchip Technology Inc.
DS20002123F-page 1
1 page  
25AA02E48/25AA02E64
FIGURE 1-1: HOLD TIMING
CS
16
SCK
SO n + 2
n+1
17
18
n
17
16
19
High-Impedance
n
SI
n+2
n+1
n
Don’t Care
5
n
HOLD
n-1
n-1
FIGURE 1-2: SERIAL INPUT TIMING
CS
2
Mode 1,1
SCK Mode 0,0
5
6
SI MSB In
SO
7
High-Impedance
8
FIGURE 1-3: SERIAL OUTPUT TIMING
CS
SCK
SO
SI
9 10
13
MSB Out
Don’t Care
14
4
12
11
3
LSB In
3
Mode 1,1
Mode 0,0
15
ISB Out
2008-2016 Microchip Technology Inc.
DS20002123F-page 5
5 Page 
25AA02E48/25AA02E64
2.6 Write Status Register Instruction
(WRSR)
The Write Status Register instruction (WRSR) allows
the user to write to the nonvolatile bits in the STATUS
register as shown in Table 2-2. See Figure 2-7 for the
WRSR timing sequence. Four levels of protection for
the array are selectable by writing to the appropriate
bits in the STATUS register. The user has the ability to
write-protect none, one, two, or all four of the
segments of the array as shown in Table 2-3.
TABLE 2-3:
BP1
0
0
1
1
ARRAY PROTECTION
BP0
Array Addresses
Write-Protected
0 none
1 upper 1/4
(C0h-FFh)
0 upper 1/2
(80h-FFh)
1 all
(00h-FFh)
FIGURE 2-7:
WRITE STATUS REGISTER TIMING SEQUENCE (WRSR)
CS
SCK
SI
0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
Instruction
Data to STATUS register
0 00 00 0 01 7 6 54 3 2 10
High-Impedance
SO
2008-2016 Microchip Technology Inc.
DS20002123F-page 11
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet 25AA02E64.PDF ] | |
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