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74HC4066 반도체 회로 부품 판매점

Quad single-pole single-throw analog switch



NXP Semiconductors 로고
NXP Semiconductors
74HC4066 데이터시트, 핀배열, 회로
74HC4066; 74HCT4066
Quad single-pole single-throw analog switch
Rev. 8 — 3 December 2015
Product data sheet
1. General description
The 74HC4066; 74HCT4066 is a quad single pole, single throw analog switch. Each
switch features two input/output terminals (nY and nZ) and an active HIGH enable input
(nE). When nE is LOW, the analog switch is turned off. Inputs include clamp diodes. This
enables the use of current limiting resistors to interface inputs to voltages in excess of
VCC.
2. Features and benefits
Input levels nE inputs:
For 74HC4066: CMOS level
For 74HCT4066: TTL level
Low ON resistance:
50 (typical) at VCC = 4.5 V
45 (typical) at VCC = 6.0 V
35 (typical) at VCC = 9.0 V
Specified in compliance with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114F exceeds 2000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from 40 C to +85 C and 40 C to +125 C


74HC4066 데이터시트, 핀배열, 회로
NXP Semiconductors
74HC4066; 74HCT4066
Quad single-pole single-throw analog switch
3. Ordering information
Table 1. Ordering information
Type number Package
Temperature range Name
Description
Version
74HC4066D 40 C to +125 C
74HCT4066D
SO14
plastic small outline package; 14 leads; body width
3.9 mm
SOT108-1
74HC4066DB 40 C to +125 C
74HCT4066DB
SSOP14
plastic shrink small outline package; 14 leads; body
width 5.3 mm
SOT337-1
74HC4066PW 40 C to +125 C
74HCT4066PW
TSSOP14 plastic thin shrink small outline package; 14 leads; body SOT402-1
width 4.4 mm
74HC4066BQ 40 C to +125 C
74HCT4066BQ
DHVQFN14 plastic dual in-line compatible thermal enhanced very
thin quad flat package; no leads; 14 terminals;
body 2.5 3 0.85 mm
SOT762-1
4. Functional diagram
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=
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=
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=
 (
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=
DDG
Fig 1. Logic symbol




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D
Fig 2. IEC logic symbol

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  ;
 
E
DDG 
Q<
9&&
9&&
*1'
Q=
DDG 
Fig 3. Schematic diagram (one switch)
74HC_HCT4066
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 8 — 3 December 2015
© NXP Semiconductors N.V. 2015. All rights reserved.
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