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AD9712 반도체 회로 부품 판매점

100MSPS D/A CONVERTERS



Analog Devices 로고
Analog Devices
AD9712 데이터시트, 핀배열, 회로
ANALOG DEVICES fAX-ON-DEHAND HOTLINE - Page 23
ANALOG
W DEVICES
12-Bit,100MSPS
UtAConverters
I AD97121AD9713I
FEATURES
100 MSPS Update Rate
ECL/TTL Compatibility
Low Glitch Impulse: 100 pV-s
Fast Settling: 30 ns to %1 LSB
Low Power: 700 mW
FUNCTIONAL BLOCK DIAGRAM
AD9712/AD9713
APPUCA TlONS
ATE
Signal Reconstruction
Arbitrary Waveform Generators
Digital Synthesizers
Signal Generators
OGENERAL DESCRIPTION
BThe AD9712 and AD9713 are I2-bit, high speed digital-
Sto-analog converters constructed in an advanced oxide isolated
bipolar process. The AD9712 is an ECL-compatible device
OfeatUring update rates of 100 MSPS minimum; the TTL-
compatible AD9713 will update at 80 MSPS minimum.
LDesigned for direct digital synthesis, waveform reconstruction,
Eand high resolution imaging applications, both devices feature
low glitch impulse of 100 pV-s; and fast settling times of 30 ns
TEto :!:1 LSB. Both units are characterized for dynamic perfor-
~2o)oo
REFERENCEY
OUT L
o(191
YcONTROL
I AMP IN
The AD9712 and AD9713 are available in 28-pin plastic DIPs
and PLCCs, with an operating temperature range of 0 to + 70°C.
Contact the factory for availability of military-grade devices.
c
~w
0a: .m.:
mance, and have excellent harmonic suppression.
C) %
~iii ;i
Q' a
Q'
Q
~
C
5
<>
~~
61 LATCH ENABLE
ANALOG RETURN 113
!I DIGITAL+V.
rn REFERENCE GROUND
:2J REFERENCE OUT
;1" CONTROL AMP IN
.!!.I CONTROL AMP OUT
m REFERENCE IN
51 ANALOG-V.
Plastic DIPPinout Designations (Top View)
221 REFERENCE GROUND
~ REFERENCE OUT
191 CONTROL AMP IN
I-,,:'
'9"
B~ w0%~,o., .:.:aE5.
:! ~ c:
~.. II!
0
0
PLCC Pinout Designations
REV.A
Information furnished by Analog Devices is believed to be accurate and
reliable. However. no responsibility is assumed by Analog Devices for its
use. nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way. P.O. Box 9106. Norwood. MA 02062-9106
Tel: 617/329-4700 Fax: 617/326-8703 Twx: 710/394-6577
We5t CQut
Central
Atlantic:
714/641-9391
214/231-5094
215/643.7790
http://www.Datasheet4U.com


AD9712 데이터시트, 핀배열, 회로
-RNRLOGDEVICES fRX-ON-DEnRND HOTLINE
Page 2~
AD9712/AD97-1S3PECIFICATIONS
ABSOLUTE MAXIMUM RATINGS!
Positive Supply Voltage (+Vs)(AD9713 Only) . . . . . . . .+6 V
Negative Supply Voltage (-Vs)
(AD9712andAD9713)
7V
DAC Outputs to ANALOG RETURN . . . . . .+0.5V to -2 V
Digital Input Voltages (D1-D12' LATCH ENABLE)
AD9712
0Vto-Vs
AD9713
0Vto+Vs
Internal Reference Output Current. . . . . - 20 JLAto + 500 fLA
Control Amplifier Input Voltage Range . . . . . . . .0Vto -4 V
ControlAmplifierOutputCurrent
.:!:2.5mA
REFERENCE IN Voltage Range. . . . . . . . . .-3.7 V to -Vs
Analog Output Current (lOUT or lOUT)
.30 mA
Operating TemperatUre Range
AD9712]NIJP
Oto+70DC
AD9713]N/]P
Oto+70DC
Maximum Junction Temperature2 . . . . . . . . . . . . . . .+IS0.C
Lead TemperatUre (Soldering, 10 seconds) . . . . . . . . .+ 300DC
Storage TemperatUre Range
.-65°C to + IS0DC
= = =ELECTRICALCHARACTERISTICS(-Vs -5.2 V;+vs +5 V(AD9713 Only); CONTROLAMP IN -1.2 V
=Parameter (Conditions)
RESOLUTION
DC ACCURACY
Differential Nonlinearity Q)
OIntegral Nonlinearity Q)
B«<Best Fit" Straight Line)
SINITIAL OFFSET ERROR
Zero-SC4UeOffset Error
OFull-Scale Gain Error3
LEOffset Drift Coefficient
TREFERENCE/CONTROL AMP
EInternal Reference Voltage
(external); R$ET 1.5 kG, unlessotherwisenoted)
Temp
Test AD9112JN/JP
Level MiD Typ
12
Max
AD9713JNIJP
MiD Typ Max Units
12 Bits
+ 25"C
Full
+ 25"C
Full
I
VI
I
VI
1.2 2.0
4.0
3.0
4.0
1.2 2.0 LSB
4.0 LSB
3.0 LSB
4.0 LSB
+25°C
Full
+2sDC
Full
+25OC
I
VI
I
VI
V
0.5 1.5
5.0
4.0 8.5
11.0
0.03
0.5 1.5 IJoA
5.0 IJoA
4.0 8.5 %
11.0 %
0.03 p.ArC
+25OC I
-1.13 - 1.26 - 1.39 -1.13 -1.26 - 1.39 V
Full I
-1.11
-1.41 -1.11
-1.41 V
Internal Reference Voltage Drift Full V
300
300 IJoV/oc
Amplifier Input Impedance
+25°C V
50
50 kO
Amplifier Bandwidth
+2SoC V
300
300 kHz
REFERENCE INPtYf4
Reference Input Impedance
Reference Multiplying Bandwidths
+25°C V
+2SoC V
3
40
3 kf!
40 MHz
OtITPUT PERFORMANCE
Full-Scale Output Currenr6
Output Compliance Range
Output Resistance
Output Capacitance
Output Update Rate7
Output Settling Time (tST)S
Current Settling
Voltage Settling (RL = 50 fi)
Output Propagation Delay (tpD)9
Glitch Impulse1O
Output Slew Ratell
Output Rise Timeu
Output Fall Timell
+ 25°C V
+ 25OC IV
+25°C IV
+2sDC V
+25DC IV
+2SoC
+2SoC
+2SoC
+2SoC
+2SoC
+2SOC
+25OC
V
V
V
V
V
V
V
20.48
-1.2 +3
2.0 2.5 3.0
30
100 110
30
30
8
100
400
3
2
20.48
-1.2 +3
2.0 2.5 3.0
30
80 90
30
30
11
100
400
3
2
mA
V
kf!
pF
M,SPS
ns
ns
ns
pV-s
V/s
ns
ns
-2-
REV.A
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