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PDF TSA1002 Data sheet ( Hoja de datos )

Número de pieza TSA1002
Descripción 50mW A/D CONVERTER
Fabricantes STMicroelectronics 
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No Preview Available ! TSA1002 Hoja de datos, Descripción, Manual

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TSA1002
10-BIT, 50MSPS, 50mW A/D CONVERTER
NOT FOR NEW DESIGN
P 10-bit A/D converter in deep submicron
ORDER CODE
CMOS technology
P Single supply voltage: 2.5V
P Input range: 2Vpp differential
P 50Msps sampling frequency
P Ultra low power consumption: 50mW @
50Msps
P ENOB=9.6 @ 40Msps, Fin=24MHz
P SFDR typically up to 72dB @ 50Msps,
Fin=5MHz
Part Number
Temperature
Range
TSA1002CF
TSA1002CFT
TSA1002IF
TSA1002IFT
EVAL1002/AA
0 C to +70 C
0 C to +70 C
-40 C to +85 C
-40 C to +85 C
Package Conditioning Marking
TQFP48
Tray
TQFP48 Tape & Reel
TQFP48
Tray
TQFP48 Tape & Reel
Evaluation board
SA1002C
SA1002C
SA1002I
SA1002I
P Built-in reference voltage with external bias
capability
)P Pinout compatibility with TSA0801, TSA1001
t(sand TSA1201
cDESCRIPTION
duThe TSA1002 is a 10-bit, 50Msps sampling
rofrequency Analog to Digital converter using a
CMOS technology combining high performances
Pand very low power consumption.
teThe TSA1002 is based on a pipeline structure and
ledigital error correction to provide excellent static
olinearity and guarantee 9.6 effective bits at
sFs=40Msps, and Fin=24MHz.
bA voltage reference is integrated in the circuit to
Osimplify the design and minimize external
-components. It is nevertheless possible to use the
)circuit with an external reference.
t(sEspecially designed for high speed, low power
capplications, the TSA1002 only dissipates 50mW
uat 50Msps. A tri-state capability, available on the
doutput buffers, enables to address several slave
roADCs by a unique master.
PThe output data can be coded into two different
formats. A Data Ready signal is raised as the data
teis valid on the output and can be used for
lesynchronization purposes.
oThe TSA1002 is available in commercial (0 to
s+70 C) and extended (-40 to +85 C) temperature
Obrange, in a small 48 pins TQFP package.
PIN CONNECTIONS (top view)
index
corner
48 47 46 45 44 43 42 41 40 39 38 37
IPOL
VREFP
VREFM
AGND
VIN
1
2
3
4
5
AGND
VINB
AGND
6
7
8
INCM 9
AGND 10
AVCC 11
AVCC 12
TSA1002
36 NC
35 NC
34 NC
33 D0 (LSB)
32 D1
31 D2
30 D3
29 D4
28 D5
27 D6
26 D7
25 D8
13 14 15 16 17 18 19 20 21 22 23 24
PACKAGE
7 x 7 mm TQFP48
APPLICATIONS
P Medical imaging and ultrasound
P Portable instrumentation
P Cable Modem Receivers
P High resolution fax and scanners
P High speed DSP interface
April 2004
1/20

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TSA1002 pdf
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TSA1002
CONDITIONS
AVCC = DVCC = VCCB = 2.5V, Fs= 40Msps,Fin= 1MHz, Vin@ -1.0dBFS, VREFM= 0V
Tamb = 25 C (unless otherwise specified)
ANALOG INPUTS
Symbol
Parameter
Test conditions
Min Typ Max Unit
VIN-VINB Full scale reference voltage
Req Equivalent input resistance
Cin Input capacitance
BW Analog Input Bandwidth
Vin@ Full scale, FS=50Msps
ERB Effective Resolution Bandwidth 1)
1) See parameters definition for more information
2.0
13
5.0
1000
60
Vpp
k
pF
MHz
MHz
REFERENCE VOLTAGE
Symbol
Parameter
Test conditions
t(s)VREFP Top internal reference voltage
cTmin= -40 C to Tmax= 85 C1)
roduVpol Analog bias voltage
PIpol Analog bias current
teIpol Analog bias current
Tmin= -40 C to Tmax= 85 C1)
Normal operating mode
Shutdown mode
bsoleVINCM Input common mode voltage
Tmin= -40 C to Tmax= 85 C1)
Obsolete Product(s) - O1) Not fully tested over the temperature range. Guaranteed by sampling.
Min
0.91
0.88
1.20
1.18
50
0.47
0.46
Typ
1.03
1.27
70
0
0.57
Max
1.14
1.16
1.35
1.36
100
0.68
0.66
Unit
V
V
V
V
µA
µA
V
V
5/20

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TSA1002 arduino
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TSA1002
Linearity vs. AVcc
Fs=50MSPS; Icca=20mA; Fin=1MHz
Distortion vs. AVcc
Fs=50MSPS; Icca=20mA; Fin=1MHz
64
63
62
61
60
59
58
57
56
2.25
ENOB
SNR
SINAD
2.35 2.45 2.55
AVCC (V)
2.65
10
9.9
9.8
9.7
9.6
9.5
9.4
9.3
9.2
9.1
9
-50
-55
-60
-65
-70
-75
-80
-85
-90
-95
-100
2.25
SFDR
THD
2.35 2.45 2.55
AVCC (V)
2.65
)Linearity vs. DVcc
t(sFs=50MSPS; Icca=20mA; Fin=1MHz
uc64
rod62
P60
te58
le56
o54
bs52
O50
t(s) -2.25
SNR
ENOB
SINAD
2.35 2.45 2.55
DVCC (V)
2.65
10
9.9
9.8
9.7
9.6
9.5
9.4
ducLinearity vs. VccB
roFs=50MSPS; Icca=20mA; Fin=1MHz
te P70
le68
o66
s ENOB
b 64
O 62
10
9.9
9.8
9.7
9.6
9.5
Distortion vs. DVcc
Fs=50MSPS; Icca=20mA; Fin=1MHz
-40
-50
-60
-70
-80
-90
-100
2.25
SFDR
THD
2.35 2.45 2.55
DVCC (V)
2.65
Distortion vs. VccB
Fs=50MSPS; Icca=20mA; Fin=1MHz
-40
-50
-60
-70 THD
60 SNR
58
SINAD
56
9.4
9.3 -80
9.2 -90
9.1
SFDR
54
2.25
2.35
2.45
2.55
9
2.65
-100
2.25 2.35 2.45 2.55 2.65
VCCB (V)
VCCB (V)
11/20

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