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PDF LC78845Q Data sheet ( Hoja de datos )
| Número de pieza | LC78845Q | |
| Descripción | Sample Rate Converter for Digital Audio | |
| Fabricantes | Sanyo Semicon Device | |
| Logotipo |  |
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Ordering number : EN*5236
CMOS LSI
LC78845Q
Sample Rate Converter for Digital Audio
Preliminary
Overview
The LC78845Q is a synchronous sample rate converter for
digital audio signals.
Features
• Converts data sampled at 32 or 48 kHz to 44.1-kHz
sampled data.
• Passes 44.1-kHz sampled data trough without change.
• Supports 384fs and 512fs system clock rates.
• 8× oversampling filters
• Soft muting function
• Built-in PLL circuit
Package Dimensions
unit: mm
3156-QFP48E
[LC78845Q]
Specifications
Absolute Maximum Ratings at Ta = 25°C
Parameter
Maximum supply voltage
I/O voltages
Operating temperature
Storage temperature
Symbol
VDD max
VI, VO
Topr
Tstg
Conditions
DC Characteristics
Parameter
Input voltage range
Input high-level voltage
Input low-level voltage
Output high-level voltage
Output low-level voltage
Symbol
VIN
VIH
VIL
VOH
VOL
Conditions
Ta = –30 to +70°C
IOH = –1 µA
IOL = 1 µA
This LSI can easily use CCB that is SANYO’s original bus format.
SANYO: QIP48E
Ratings
–0.3 to +7.0
–0.3 to VDD + 0.3
–30 to +70
–55 to +125
Unit
V
V
°C
°C
min
0
0.7 VDD
VDD – 0.05
typ max Unit
VDD
V
V
0.3 VDD
V
V
VSS + 0.05
V
• CCB is a trademark of SANYO ELECTRIC CO., LTD.
• CCB is SANYO’s original bus format and all the bus
addresses are controlled by SANYO.
SANYO Electric Co.,Ltd. Semiconductor Bussiness Headquarters
TOKYO OFFICE Tokyo Bldg., 1-10, 1 Chome, Ueno, Taito-ku, TOKYO, 110-0005 JAPAN
22896HA (OT) No. 5236-1/10
1 page  
Continued from preceding page.
Pin No.
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
Symbol
CE
CL
DI
DO7
DO6
DO5
DGND
DVDD
DO4
DO3
DO2
DO1
DO0
DATAO
LRCKO
WCLKO
BCLKO
DGND
N.C
AGND
VCO
VIN
R
STOP
UNLK
MCK2
AVDD
AVDD
MUTE
FSEL3
TEST1
DVDD
DVDD
FSEL2
FSEL1
TEST2
TEST3
Overview
Microprocessor input pins
Parallel data output
Digital system ground
Digital system power supply
Parallel data output
Audio signal output
Digital system ground
—
Analog system ground
PLL control
PLL control
PLL control
Oscillator stop signal input
Unlock detection output
Synchronization clock output
Analog system power supply
Analog system power supply
Muting
Output data fs selection
Test pin
Digital system power supply
Digital system power supply
Input signal fs selection
Test pins
LC78845Q
Data enable signal input
Shift clock input
Address/data input
Function
Output of 8-bit parallel data according to microprocessor input
Output of 8-bit parallel data according to microprocessor input
Audio signal outputs (data, left/right clock, word clock, and bit clock)
Low-pass filter connection
Free-running setting
VCO band adjustment
Low: oscillator stopped, high: PLL running
Outputs a high level when the PLL circuit is unlocked.
Outputs the clock generated by the VCO.
Low: muting off, high: muting on
Low: fs data, high: 2fs data
Must be held low during normal operation.
Selects the fs for the input signal.
Must be held low during normal operation.
No. 5236-5/10
5 Page | ||
| Páginas | Total 10 Páginas | |
| PDF Descargar | [ Datasheet LC78845Q.PDF ] | |
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