AD9117 반도체 회로 부품 판매점
8-/10-/12-/14-Bit Low Power Digital-to-Analog Converters
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 Analog Devices |
Data Sheet
Dual Low Power, 8-/10-/12-/14-Bit
TxDAC Digital-to-Analog Converters
AD9114/AD9115/AD9116/AD9117
FEATURES
Power dissipation @ 3.3 V, 20 mA output
191 mW @ 10 MSPS
232 mW @ 125 MSPS
Sleep mode: <3 mW @ 3.3 V
Supply voltage: 1.8 V to 3.3 V
SFDR to Nyquist
86 dBc @ 1 MHz output
85 dBc @ 10 MHz output
AD9117 NSD @ 1 MHz output, 125 MSPS, 20 mA: −162 dBc/Hz
Differential current outputs: 2 mA to 20 mA
2 on-chip auxiliary DACs
CMOS inputs with single-port operation
Output common mode: adjustable 0 V to 1.2 V
Small footprint 40-lead LFCSP RoHS-compliant package
APPLICATIONS
Wireless infrastructures
Picocell, femtocell base stations
Medical instrumentation
Ultrasound transducer excitation
Portable instrumentation
Signal generators, arbitrary waveform generators
GENERAL DESCRIPTION
The AD9114/AD9115/AD9116/AD9117 are pin-compatible
dual, 8-/10-/12-/14-bit, low power digital-to-analog converters
(DACs) that provide a sample rate of 125 MSPS. These TxDAC®
converters are optimized for the transmit signal path of commu-
nication systems. All the devices share the same interface, package,
and pinout, providing an upward or downward component
selection path based on performance, resolution, and cost.
The AD9114/AD9115/AD9116/AD9117 offer exceptional ac and
dc performance and support update rates up to 125 MSPS.
The flexible power supply operating range of 1.8 V to 3.3 V and
low power dissipation of the AD9114/AD9115/AD9116/AD9117
make them well suited for portable and low power applications.
PRODUCT HIGHLIGHTS
1. Low Power. DACs operate on a single 1.8 V to 3.3 V supply;
total power consumption reduces to 225 mW at 100 MSPS.
Sleep and power-down modes are provided for low power
idle periods.
2. CMOS Clock Input. High speed, single-ended CMOS clock
input supports a 125 MSPS conversion rate.
3. Easy Interfacing to Other Components. Adjustable output
common mode from 0 V to 1.2 V allows for easy interfacing
to other components that accept common-mode levels
greater than 0 V.
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevices for itsuse,nor foranyinfringementsofpatentsor other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113 ©2008–2013 Analog Devices, Inc. All rights reserved.
AD9114/AD9115/AD9116/AD9117
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications....................................................................................... 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Revision History ............................................................................... 3
Functional Block Diagram .............................................................. 4
Specifications..................................................................................... 5
DC Specifications ......................................................................... 5
Digital Specifications ................................................................... 7
AC Specifications.......................................................................... 8
Absolute Maximum Ratings............................................................ 9
Thermal Resistance ...................................................................... 9
ESD Caution.................................................................................. 9
Pin Configurations and Function Descriptions ......................... 10
Typical Performance Characteristics ........................................... 18
Terminology .................................................................................... 31
Theory of Operation ...................................................................... 32
Serial Peripheral Interface (SPI) ................................................... 33
General Operation of the Serial Interface ............................... 33
Instruction Byte .......................................................................... 33
Serial Interface Port Pin Descriptions ..................................... 33
MSB/LSB Transfers..................................................................... 34
Serial Port Operation ................................................................. 34
Pin Mode ..................................................................................... 34
SPI Register Map............................................................................. 35
Data Sheet
SPI Register Descriptions .............................................................. 36
Digital Interface Operation ........................................................... 40
Digital Data Latching and Retimer Section............................ 41
Estimating the Overall DAC Pipeline Delay........................... 42
Reference Operation .................................................................. 43
Reference Control Amplifier .................................................... 43
DAC Transfer Function ............................................................. 43
Analog Output ............................................................................ 44
Self-Calibration........................................................................... 44
Coarse Gain Adjustment ........................................................... 45
Using the Internal Termination Resistors ............................... 46
Applications Information .............................................................. 47
Output Configurations .............................................................. 47
Differential Coupling Using a Transformer ............................... 47
Single-Ended Buffered Output Using an Op Amp ................ 47
Differential Buffered Output Using an Op Amp .................. 48
Auxiliary DACs........................................................................... 48
DAC-to-Modulator Interfacing................................................ 49
Correcting for Nonideal Performance of Quadrature
Modulators on the IF-to-RF Conversion ................................ 49
I/Q Channel Gain Matching ..................................................... 49
LO Feedthrough Compensation .............................................. 50
Results of Gain and Offset Correction .................................... 50
Outline Dimensions ....................................................................... 51
Ordering Guide .......................................................................... 52
Rev. C | Page 2 of 52
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