|
|
PDF CXA1166 Data sheet ( Hoja de datos )
| Número de pieza | CXA1166 | |
| Descripción | 8-bit 250 MSPS Flash A/D Converter | |
| Fabricantes | Sony Corporation | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de CXA1166 (archivo pdf) en la parte inferior de esta página. Total 28 Páginas | ||
|
No Preview Available !
CXA1166K
8-bit 250 MSPS Flash A/D Converter
Description
The CXA1166K is an 8-bit ultrahigh-speed flash
A/D converter IC capable of digitizing analog signals
at a maximum rate of 250 MSPS. The digital I/O
level of this A/D converter is compatible with the
ECL 100K/10KH/10K.
This IC is pin-compatible with the conventional
CXA1076AK/CXA1176K/CXA1176AK, and can
replace the conventional models easily. Compared
with the conventional models, the CXA1166K has a
greatly improved performance because of the new
circuit design and carefully considered layout.
Features
• Differential linearity error: ±0.5 LSB or less
• Integral linearity error: ±0.5 LSB or less
• Built-in integral linearity compensation circuit
• Ultrahigh-speed operation with maximum conver-
sion rate of 250 MSPS
• Low input capacitance: 18pF
• Wide analog input bandwidth: 250MHz (full-scale
input, standard)
• Single power supply: –5.2V
• Low power consumption: 1.4W (Typ.)
• Low error rate
• Good temperature characteristics
• Capable of driving 50Ω loads
68 pin LCC (Ceramic)
Structure
Bipolar silicon monolithic IC
Applications
• Digital oscilloscopes
• Other apparatus requiring ultrahigh-speed A/D
conversion
Pin Configuration (Top View)
Pins without name are NC pins (not connected internally).
AGND
AVEE
VRT
VRTS
AVEE
AVEE
LINV
OR
OR
D0
D0
D1
D1
DVEE
61
62
63
64
65
66
67
68
1
2
3
4
5
6
7
8
9
43 AGND
42 AVEE
41
40 VRB
39 VRBS
38 AVEE
37 AVEE
36
35 CLK
34 CLK
33 MINV
32 D7
31 D7
30 D6
29 D6
28 DVEE
27
Sony reserves the right to change products and specifications without prior notice. This information does not convey any license by
any implication or otherwise under any patents or other right. Application circuits shown, if any, are typical examples illustrating the
operation of the devices. Sony cannot assume responsibility for any problems arising out of the use of these circuits.
–1–
E90406-ST
1 page  
CXA1166K
Pin
No.
Symbol
31 D7
32 D7
29 D6
30 D6
21 D5
22 D5
19 D4
20 D4
14 D3
15 D3
12 D2
13 D2
6 D1
7 D1
4 D0
5 D0
I/O
Standard
voltage level
O
O
O
O
O
ECL
O
O
O
2 OR
3 OR
O
Equivalent circuit
DGND2
16
17
Di
Di
Description
MSB and complementary
MSB output
D1 to D6: Output
D1 to D6: Complementary
output
DVEE
8
28
LSB and complementary
LSB output
Overrange output;
Low level for overrange.
Overrange complementary
output;
High level for overrange.
37, 38,
42, 58,
62, 66,
AVEE∗
67
–5.2V
AGND
61 48 53
43 51 56
DGND2
DGND1
16 17
18
Analog supply.
Internally connected with
DVEE (resistance: 4 to 6Ω).
43, 48,
51, 53, AGND∗
56, 61
8
28
DVEE∗
18 DGND1
0V
–5.2V
0V
Internal
Analog
Circuit
Internal
Digital
Circuit
4 to 6Ω
42 37 58
62 38 66
8 28
DVEE
Di
Di
Analog ground.
Separated from DGND.
Digital supply.
Internally connected with
AVEE (resistance: 4 to 6Ω).
Digital ground
16
17
DGND2∗
0V
67
AVEE
Digital ground for output
drive
41, 44,
45, 46,
47, 57, NC
59, 60,
63
—
No connected.
It is recommended to connect
these pins to AGND.
9, 10,
11, 23,
24, 25, NC
26, 27,
36, 68
—
No connected.
It is recommended to connect
these pins to DGND.
∗ For stable operation, all of these pins must be connected on the corresponding PCB pattern.
–5–
5 Page 
CXA1166K
• Unlike the CXA1176, VRTS and VRBS are connected to the reference resistors via resistors of approximately
500Ω. Since these resistors may be eliminated in the future improved versions of this converter, use a
reference voltage generation circuit which is adaptable to their elimination. The reference voltage generation
circuit (the section composed of IC12_2, etc.) in the Application Circuit is recommended.
• Although VRM is provided to compensate for the integral linearity error, there is no need for such
compensation. It is recommended that it is kept open.
• OR and OR are output pins for indicating that the input is over range. They are not inverted by MINV or LINV.
• Noise in MINV and LINV results in misoperation, the cause of which is extremely difficult to track down. Keep
these pins open in cases where low level setting voltage alone is sufficient. When high level voltage input is
required, provide the shortest possible by-pass from them to DGND using chip capacitors (approximately
0.1µF). Input voltages of –0.5V to –1.0V for high level and –1.6V to –2.5V for low level are recommend. Do
not make the direct connection to DGND when high level voltage is input.
• Inputting differential signals is recommended for the CLK and CLK clock input pins. Although operation is
possible by driving only the CLK pin, doing so involves the risk that the characteristics may become unstable
near the maximum speed. This is because the internal operation of the A/D converter depends on both clock
rise and fall.
• When the CLK pin is not used, by-pass it to DGND using a capacitor (approximately 0.1µF). At this time,
approximately –1.3V voltage will be generated at this pin. However, the driving capacity is too weak for this to
be used as the VBB threshold voltage. It cannot drive even one ECL input load.
• This converter is designed to be used at the clock duty cycle of 50%. The deviation from this condition will
subtly affect the performance of the A/D converter but the degree of the affection is not so great as to require
adjustment. The “Error rate vs. Clock duty cycle characteristics” graph shows an example of these changes
in the converter’s performance.
• Increasing chip temperature will cause the supply current and also the error rate to rise. Adding to these
reasons, in order to prolong the converter’s service life, provide an adequate means of cooling. See the
“Maximum conversion frequency vs. Temperature characteristics” and “Supply current vs. Temperature
characteristics” graphs. The reference data for thermal resistance is shown in the “Thermal resistance of the
converter mounted on a board” graph. Note that the actual thermal resistance will differ greatly depending on
the mounting conditions.
• Since the CXA1166K is a high-speed IC, take adequate measures to prevent electrostatic breakdown. For
further details on these measures, refer to “Precautions for IC Application” in Sony’s Data book.
• Sony’s SPECL series is used as the logic ICs in the Application Circuit to investigate the maximum
performance of the CXA1166K. For normal applications, lower speed logic ICs can be used according to the
applied frequency.
– 11 –
11 Page | ||
| Páginas | Total 28 Páginas | |
| PDF Descargar | [ Datasheet CXA1166.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| CXA1163M | DOLBY B TYPE NOISE REDUCTION SYSTEM | Sony Corporation |
| CXA1163P | DOLBY B TYPE NOISE REDUCTION SYSTEM | Sony Corporation |
| CXA1165M | CATV VHF Tuner |  ETC |
| CXA1165M | CATV and VHF TV Tuner |  Sony |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |