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ADC-207 반도체 회로 부품 판매점

7- BIT 20MHZ CMOS FLASH A/D CONVERTERS



ETC 로고
ETC
ADC-207 데이터시트, 핀배열, 회로
®®
INN O VAT IO N a n d E X C E L L E N C E
ADC-207
7-Bit, 20MHz, CMOS
Flash A/D Converters
FEATURES
7-bit flash A/D converter
20MHz sampling rate
Low power (250mW)
Single +5V supply
1.2 micron CMOS technology
7-bit latched 3-state output with overflow bit
Surface-mount versions
High-reliability version
No missing codes
GENERAL DESCRIPTION
The ADC-207 is the industry’s first 7-bit flash converter using an
advanced high-speed VLSI 1.2 micron CMOS process. This
process offers some very distinctive advantages over other
processes, making the ADC-207 unique. The smaller
geometrics of the process achieve high speed, better linearity
and superior temperature performance.
Since the ADC-207 is a CMOS device, it also has very low
power consumption (250mW). The device draws power from
a single +5V supply and is conservatively rated for 20MHz
operation. The ADC-207 allows using sampling apertures as
small as 12ns, making it more closely approach an ideal
sampler. The small sampling apertures also let the device
operate at greater than 20MHz.
The ADC-207 has 128 comparators which are auto-balanced
on every conversion to cancel out any offsets due to
temperature and/or dynamic effects. The resistor ladder has a
midpoint tap for use with an external voltage source to improve
integral linearity beyond 7 bits. The ADC-207 also provides the
user with 3-state outputs for easy interfacing to other
components.
There are six models of the ADC-207 covering two operating
temperature ranges, 0 to +70°C and –55 to +125°C. Two high-
reliability "QL" models are also available.
ANALOG INPUT 4
+REFERENCE 6
R/2
+VDD
+5V SUPPLY 18
R
DIGITAL GROUND 2
ANALOG GROUND 7
R
RANGE MIDPOINT 5
R/2
R/2
2
1
R
–REFERENCE 3
R
CS1 8
CS2 9
D
GQ
D
GQ
128-TO-7
ENCODER
D
GQ
D
GQ
D
GQ
2
1
CLOCK
GENERATOR
1 CLOCK INPUT
DQ
G
DQ
G
DQ
G
DQ
G
DQ
G
DQ
G
DQ
G
DQ
G
10 OVERFLOW
11 BIT 1 (MSB)
12 BIT 2
13 BIT 3
14 BIT 4
15 BIT 5
16 BIT 6
17 BIT 7 (LSB)
INPUT/OUTPUT
CONNECTIONS
DIP
PINS
FUNCTION
LCC
PINS
1 CLOCK INPUT
2 DIGITAL GROUND
3 –REFERENCE
4 ANALOG INPUT
5 MIDPOINT
6 +REFERENCE
7 ANALOG GROUND
8 CS1
9 CS2
10 OVERFLOW
11 BIT 1 (MSB)
12 BIT 2
13 BIT 3
14 BIT 4
15 BIT 5
16 BIT 6
17 BIT 7 (LSB)
18 +5V SUPPLY
1
4
5
6
7
8
9
11
12
13
14
16
17
19
20
21
23
24
Figure 1. ADC-207 Functional Block Diagram (DIP Pinout)
DATEL, Inc., 11 Cabot Boulevard, Mansfield, MA 02048-1151 (U.S.A.) Tel: (508) 339-3000 Fax: (508) 339-6356 For immediate assistance (800) 233-2765


ADC-207 데이터시트, 핀배열, 회로
ADC-207
®®
ABSOLUTE MAXIMUM RATINGS
PARAMETERS
LIMITS
Power Supply Voltage (+VDD)
Digital Inputs
Analog Input
Reference Inputs
Digital Outputs
(short circuit protected to ground)
Lead Temperature (10 sec. max.)
–0.5 to +7
–0.5 to +5.5
–0.5 to (+VDD +0.5)
–0.5 to +VDD
–0.5 to +5.5
+300
UNITS
Volts
Volts
Volts
Volts
Volts
°C
PHYSICAL/ENVIRONMENTAL
PARAMETERS
MIN. TYP. MAX. UNITS
Operating Temp. Range, Case:
LC/MC Versions
MM/LM/QL Versions
Storage Temp. Range
Package Type
DIP
LCC
0 — +70
–55 — +125
–65 — +150
18-pin ceramic DIP
24-pin ceramic LCC
°C
°C
°C
FUNCTIONAL SPECIFICATIONS
(Typical at +5V power, +25°C, 20MHz clock, +REFERENCE = +5V,
–REFERENCE = ground, unless noted)
ANALOG INPUT
Input Type
Input Range (dc-20MHz)
Input Impedance
Input Capacitance (Full Range)
MIN. TYP. MAX.
Single-ended, non-isolated
0 — +5
— 1000 —
— 10 —
UNITS
Volts
Ohms
pF
DIGITAL INPUTS
Logic Levels
Logic "1"
+3.2 —
— Volts
Logic "0"
— — +0.8 Volts
Logic Loading "1"
— ±1 ±5 microamps
Logic Loading "0"
— ±1 ±5 microamps
Sample Pulse Width
(During Sampling Portion of Clock) 12 — —
ns
Reference Ladder Resistance
225 330 — Ohms
PERFORMANCE
Conversion Rate Œ
Harmonic Distortion 
(8MHz 2nd Order Harmonic)
Differential Gain Ž
Differential Phase Ž
Aperture Delay
Aperture Jitter
No Missing Codes
LC/MC grade
LM/MM grade
Integral Linearity 
Over Temperature Range
Differential Nonlinearity
Over Temperature Range
Power Supply Rejection
20 25 — MHz
— –40 —
dB
—3— %
— 1.5 — degrees
— 8 — ns
— 50 —
ps
0
— +70
°C
–55 — +125 °C
— ±0.8 ±1
LSB
±0.8 ±1
LSB
— ±0.3 ±0.6 LSB
— ±0.4 ±0.6 LSB
— ±0.02 — %FSR/%Vs
DIGITAL OUTPUTS
Data Coding
Data Output Resolution
Logic Levels
Logic "1"
Logic "0" (at 1.6mA)
Logic Loading "1"
Logic Loading "0"
Output Data Valid Delay
(From Rising Edge)
Straight binary
7 ——
+2.4 +4.5
— — +0.4
–4 — —
+4 — —
— 15 25
Bits
Volts
Volts
mA
mA
ns
POWER REQUIREMENTS
Power Supply Range (+VDD)
Power Supply Current
Power Dissipation
+3.0 +5.0 +5.5
— +50 +70
— 250 385
Volts
mA
mW
Footnotes:
ΠAt full power input and chip selects enabled.
 At 4MHz input and 20MHz clock.
Ž For 10-step, 40 IRE NTSC ramp test.
 Adjustable using reference ladder midpoint tap. See ADC-207 Operation.
TECHNICAL NOTES
1. Input Buffer Amplifier – Since the ADC-207 has a switched
capacitor type input, the input impedance of the 207 is
dependent on the clock frequency. At relatively slow
conversion rates, a general purpose type input buffer can be
used; at high conversion rates DATEL recommends either
the HA-5033 or Elantec 2003. See Figure 2 for typical
connections.
2. Reference Ladder – Adjusting the voltage at +REFERENCE
adjusts the gain of the ADC-207. Adjusting the voltage at –
REFERENCE adjusts the offset or zero of the ADC-207.
The midpoint pin is usually bypassed to ground through a
0.1µF capacitor, although it can be tied to a precision
voltage halfway between +REFERENCE and
–REFERENCE. This would improve integral linearity
beyond 7 bits.
3. Clock Pulse Width – To improve performance at Nyquist
bandwidths, the clock duty cycle can be adjusted so that the
low portion of the clock pulse is 12ns wide. The smaller
aperture allows the ADC-207 to closely resemble an ideal
sampler. See Figure 4.
4. At sampling rates less than 100kHz, there may be some
degradation in offset and differential nonlinearity.
Performance may be improved by increasing the clock duty
cycle (decreasing the time spent in the sample mode).
CAUTION
Since the ADC-207 is a CMOS device, normal precautions
against static electricity should be taken. Use ground straps,
grounded mats, etc. The Absolute Maximum Ratings of the
device MUST NOT BE EXCEEDED as irrevocable damage to
the ADC-207 will occur.
0.1µF
+15
47µF
+
20MHz
CLOCK
+5V
12
5 11
HA-5033
10
10
47µF
0.1µF
+
–15
0.1µF
+5V
4.7µF
+
0.01µF
1
CLOCK
2
DIGITAL GND
18
+VDD
B7 17 B7 (LSB)
3
–REFERENCE
B6 16 B6
4
VIN
15
B5 B5
5 14
MID B4 B4
6 13
+REFERENCE
B3
B3
7 12
ANALOG GND
B2
B2
8 11
CS1 B1 B1 (MSB)
9
CS2
10
OF OF
Figure 2. Typical Connections for Using the ADC-207
2




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