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AD10265 반도체 회로 부품 판매점

65 MSPS A/D Converter



Analog Devices 로고
Analog Devices
AD10265 데이터시트, 핀배열, 회로
aDual Channel, 12-Bit, 65 MSPS A/D Converter
with Analog Input Signal Conditioning
AD10265
FEATURES
Dual, 65 MSPS Minimum Sample Rate
Channel-Channel Matching, ؎0.1% Gain Error
Channel-Channel Isolation, >80 dB
AC-Coupled Signal Conditioning Included
Selectable Bipolar Input Voltage Range
(؎0.5 V, ؎1.0 V, ؎2.0 V)
Gain Flatness up to Nyquist: < 0.5 dB
80 dB Spurious-Free Dynamic Range
Two’s Complement Output Format
3.3 V or 5 V CMOS-Compatible Output Levels
1.05 W Per Channel
Industrial and Military Grade
APPLICATIONS
Phased Array Receivers
Communications Receivers
FLIR Processing
Secure Communications
GPS Anti-Jamming Receivers
Multichannel, Multimode Receivers
PRODUCT DESCRIPTION
The AD10265 is a full channel ADC solution with on-module
signal conditioning for improved dynamic performance and
fully matched channel-to-channel performance. The module
includes two wide dynamic range AD6640 ADCs. Each AD6640
has an AD9631/AD9632 ac-coupled amplifier front end. The
AD6640s have on-chip track-and-hold circuitry, and utilize an
innovative multipass architecture, to achieve 12-bit, 65 MSPS
performance. The AD10265 uses innovative high-density
circuit design and laser-trimmed thin-film resistor networks to
achieve exceptional matching and performance while still main-
taining excellent isolation, and providing for significant board
area savings.
The AD10265 operates with ± 5.0 V for the analog signal
conditioning with a separate +3.3 V supply for the analog-to-
digital conversion. Each channel is completely independent
allowing operation with independent Encode and Analog
inputs. The AD10265 also offers the user a choice of Analog
Input Signal ranges to further minimize additional external
signal conditioning, while still remaining general-purpose.
The AD10265 is packaged in a 68-lead ceramic gull wing pack-
age, footprint compatible with the earlier generation AD10242
(12-bit, 40 MSPS). Manufacturing is done on Analog Devices’
MIL-38534 Qualified Manufacturers Line (QML) and com-
ponents are available up to Class-T (–25°C to +125°C). The
AD6640 internal components are manufactured on Analog
Devices’ high-speed complementary bipolar process (XFCB).
PRODUCT HIGHLIGHTS
1. Guaranteed sample rate of 65 MSPS.
2. Input amplitude options, user configurable.
3. Input signal conditioning included; both channels matched
for gain.
4. Fully tested/characterized performance for full channel.
5. Footprint compatible family; 68-lead LCCC.
AINA3
FUNCTIONAL BLOCK DIAGRAM
AINA2
AINA1
AINB3
AINB2
AINB1
(LSB) D0A
D1A
D2A
D3A
D4A
D5A
D6A
D7A
D8A
AD9632
AD9631
AD9632
AD9631
9
TIMING
AIN AIN
AD6640
12
OUTPUT BUFFERING
AD10265
AIN AIN
AD6640
12
OUTPUT BUFFERING
7
TIMING
5
ENCODEB
ENCODEB
D11B (MSB)
D10B
D9B
D8B
D7B
ENCODEA ENCODEA D9A D10A D11A
(MSB)
D0B D1B D2B D3B D4B D5B D6B
(LSB)
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703
© Analog Devices, Inc., 2001


AD10265 데이터시트, 핀배열, 회로
AD10265–SPECIFICATIONS
Electrical Characteristics (AVCC = +5 V; AVEE = –5.0 V; DVCC = +3.3 V; applies to each ADC unless otherwise noted.)
Parameter
Temp
Test
Level
Mil
Subgroup
AD10265AZ
Min Typ Max Unit
RESOLUTION
12 Bits
ACCURACY
No Missing Codes
Offset Error
Gain Error1
Gain Error Channel Match
Pass Band Ripple to Nyquist
Full
Full
25°C
Full
Full
Full
IV
IV
I
VI
V
IV
12
2, 3
1
2, 3
12
Guaranteed
–10 +3.5 +10 mV
–1.5 ± 0.5 +1.5 % FS
–2.5 ± 0.8 +2.5 % FS
± 0.2 %
0.2 0.5 dB
ANALOG INPUT (AIN)
Input Voltage Range
AIN1
AIN2
AIN3
Input Resistance
AIN1
AIN2
AIN3
Input Capacitance2
Analog Input Bandwidth High3
Analog Input Bandwidth Low3
ENCODE INPUT4, 5
Logic Compatibility
Logic “1” Voltage
Logic “0” Voltage
Logic “1” Current (VINH = 5 V)
Logic “0” Current (VINL = 0 V)
Input Capacitance
Full
Full
Full
Full
Full
Full
25°C
25°C
25°C
Full
Full
Full
Full
25°C
V
V
V
IV
IV
IV
IV
V
V
IV
IV
IV
IV
IV
IV
12
12
12
12
12
99
198
396
0
2.0
0
500
–400
± 0.5
± 1.0
±2
100 101
200 202
400 404
4.0 7.0
160
50
TTL/CMOS
650
–320
4.5
5.0
0.8
800
–200
7.0
V
V
V
pF
MHz
kHz
V
V
µA
µA
pF
SWITCHING PERFORMANCE
Maximum Conversion Rate6
Minimum Conversion Rate6
Aperture Delay (tA)
Aperture Delay Matching
Aperture Uncertainty (Jitter)
ENCODE Pulsewidth High
ENCODE Pulsewidth Low
Output Delay (tOD)
SNR7
Analog Input @ 1.24 MHz
@ 17 MHz
@ 32 MHz
SINAD8
Analog Input @ 1.24 MHz
@ 17 MHz
@ 32 MHz
Full
Full
25°C
25°C
25°C
25°C
25°C
Full
25°C
Full
25°C
Full
25°C
Full
25°C
Full
25°C
Full
25°C
Full
VI
IV
V
V
V
IV
IV
IV
I
II
I
II
I
II
I
II
I
II
I
II
4, 5, 6
12
12
12
12
4
5, 6
4
5, 6
4
5, 6
4
5, 6
4
5, 6
4
5, 6
65 MSPS
6.5 MSPS
400 ps
± 2.0 ns
0.3 ps rms
6.5 ns
6.5 ns
7.0 9.0 12.5 ns
62 66
60.5 66
61 65
60 65
61 63
59.5 62
dB
dB
dB
dB
dB
dB
61 65
60 64
61 64
59.5 63
61 62
59 62
dB
dB
dB
dB
dB
dB
–2– REV. A




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AD10265

65 MSPS A/D Converter - Analog Devices