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AD9220 반도체 회로 부품 판매점

Complete 12-Bit 1.5/3.0/10.0 MSPS Monolithic A/D Converters



Analog Devices 로고
Analog Devices
AD9220 데이터시트, 핀배열, 회로
Complete 12-Bit 1.5/3.0/10.0 MSPS
Monolithic A/D Converters
AD9221/AD9223/AD9220
FEATURES
Monolithic 12-Bit A/D Converter Product Family
Family Members Are: AD9221, AD9223, and AD9220
Flexible Sampling Rates: 1.5 MSPS, 3.0 MSPS, and
10.0 MSPS
Low Power Dissipation: 59 mW, 100 mW, and 250 mW
Single 5 V Supply
Integral Nonlinearity Error: 0.5 LSB
Differential Nonlinearity Error: 0.3 LSB
Input Referred Noise: 0.09 LSB
Complete On-Chip Sample-and-Hold Amplifier and
Voltage Reference
Signal-to-Noise and Distortion Ratio: 70 dB
Spurious-Free Dynamic Range: 86 dB
Out-of-Range Indicator
Straight Binary Output Data
28-Lead SOIC and 28-Lead SSOP
GENERAL DESCRIPTION
The AD9221, AD9223, and AD9220 are a generation of high
performance, single supply 12-bit analog-to-digital converters.
Each device exhibits true 12-bit linearity and temperature drift
performance1 as well as 11.5-bit or better ac performance.2 The
AD9221/AD9223/AD9220 share the same interface options,
package, and pinout. Thus, the product family provides an upward
or downward component selection path based on performance,
sample rate and power. The devices differ with respect to their
specified sampling rate, and power consumption, which is reflected
in their dynamic performance over frequency.
The AD9221/AD9223/AD9220 combine a low cost, high speed
CMOS process and a novel architecture to achieve the resolution
and speed of existing hybrid and monolithic implementations at
a fraction of the power consumption and cost. Each device is a
complete, monolithic ADC with an on-chip, high performance,
low noise sample-and-hold amplifier and programmable voltage
reference. An external reference can also be chosen to suit the
dc accuracy and temperature drift requirements of the application.
The devices use a multistage differential pipelined architecture
with digital output error correction logic to provide 12-bit accu-
racy at the specified data rates and to guarantee no missing
codes over the full operating temperature range.
The input of the AD9221/AD9223/AD9220 is highly flexible,
allowing for easy interfacing to imaging, communications, medi-
cal, and data-acquisition systems. A truly differential input
structure allows for both single-ended and differential input
interfaces of varying input spans. The sample-and-hold
NOTES
1Excluding internal voltage reference.
2Depends on the analog input configuration.
REV. E
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties that
may result from its use. No license is granted by implication or otherwise
under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective companies.
FUNCTIONAL BLOCK DIAGRAM
CLK
AVDD
DVDD
VINA
VINB
CAPT
CAPB
VREF
SENSE
SHA
MDAC1
GAIN = 16
MDAC2
GAIN = 8
MDAC3
GAIN = 4
5
A/D
4
A/D
3
A/D
54
3
DIGITAL CORRECTION LOGIC
12
OUTPUT BUFFERS
A/D
3
MODE
SELECT
1V
AD9221/AD9223/AD9220
REFCOM
AVSS
DVSS
CML
OTR
BIT 1
(MSB)
BIT 12
(LSB)
amplifier (SHA) is equally suited for both multiplexed sys-
tems that switch full-scale voltage levels in successive channels
as well as sampling single-channel inputs at frequencies up to
and beyond the Nyquist rate. Also, the AD9221/AD9223/AD9220
is well suited for communication systems employing Direct-
IF down conversion since the SHA in the differential input
mode can achieve excellent dynamic performance far beyond its
specified Nyquist frequency.2
A single clock input is used to control all internal conversion
cycles. The digital output data is presented in straight binary
output format. An out-of-range (OTR) signal indicates an over-
flow condition that can be used with the most significant bit to
determine low or high overflow.
PRODUCT HIGHLIGHTS
The AD9221/AD9223/AD9220 family offers a complete single-
chip sampling 12-bit, analog-to-digital conversion function in
pin compatible 28-lead SOIC and SSOP packages.
Flexible Sampling Rates—The AD9221, AD9223, and AD9220
offer sampling rates of 1.5 MSPS, 3.0 MSPS, and 10.0 MSPS,
respectively.
Low Power and Single Supply—The AD9221, AD9223, and
AD9220 consume only 59 mW, 100 mW, and 250 mW, respec-
tively, on a single 5 V power supply.
Excellent DC Performance Over Temperature—The AD9221/
AD9223/AD9220 provide 12-bit linearity and temperature drift
performance.1
Excellent AC Performance and Low Noise—The AD9221/
AD9223/AD9220 provide better than 11.3 ENOB performance
and have an input referred noise of 0.09 LSB rms.2
Flexible Analog Input Range—The versatile on-board sample-
and-hold (SHA) can be configured for either single-ended or
differential inputs of varying input spans.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700
www.analog.com
Fax: 781/326-8703 © 2003 Analog Devices, Inc. All rights reserved.


AD9220 데이터시트, 핀배열, 회로
AD9221/AD9223/AD9220–SPECIFICATIONS
DC SPECIFICATIONS (AVDD = 5 V, DVDD = 5 V, fSAMPLE = Max Conversion Rate, VREF = 2.5 V, VINB = 2.5 V, TMIN to TMAX, unless
otherwise noted.)
Parameter
AD9221
AD9223
RESOLUTION
12 12
MAX CONVERSION RATE
1.5 3
INPUT REFERRED NOISE (TYP)
VREF = 1 V
VREF = 2.5 V
ACCURACY
Integral Nonlinearity (INL)
Differential Nonlinearity (DNL)
INL1
DNL1
No Missing Codes
Zero Error (@ 25°C)
Gain Error (@ 25°C)2
Gain Error (@ 25°C)3
0.23
0.09
± 0.4
± 1.25
± 0.3
± 0.75
± 0.6
± 0.3
12
± 0.3
± 1.5
± 0.75
0.23
0.09
± 0.5
± 1.25
± 0.3
± 0.75
± 0.6
± 0.3
12
± 0.3
± 1.5
± 0.75
TEMPERATURE DRIFT
Zero Error
Gain Error2
Gain Error3
±2 ±2
± 26 ± 26
± 0.4 ± 0.4
POWER SUPPLY REJECTION
AVDD, DVDD (+5 V ± 0.25 V)
± 0.06
± 0.06
ANALOG INPUT
Input Span (with VREF = 1.0 V)
Input Span (with VREF = 2.5 V)
Input (VINA or VINB) Range
Input Capacitance
2
5
0
AVDD
16
2
5
0
AVDD
16
INTERNAL VOLTAGE REFERENCE
Output Voltage (1 V Mode)
Output Voltage Tolerance (1 V Mode)
Output Voltage (2.5 V Mode)
Output Voltage Tolerance (2.5 V Mode)
Load Regulation4
1
± 14
2.5
± 35
2.0
1
± 14
2.5
± 35
2.0
REFERENCE INPUT RESISTANCE 5 5
POWER SUPPLIES
Supply Voltages
AVDD
DVDD
Supply Current
IAVDD
IDVDD
5
2.7 to 5.25
14.0
11.8
0.5
0.02
5
2.7 to 5.25
26
20
0.5
0.02
POWER CONSUMPTION
59.0 100
70.0 130
NOTES
1VREF = 1 V.
2Including internal reference.
3Excluding internal reference.
4Load regulation with 1 mA load current (in addition to that required by the AD9221/AD9223/AD9220).
Specification subject to change without notice.
AD9220
12
10
0.23
0.09
± 0.5
± 1.25
± 0.3
± 0.75
± 0.7
± 0.35
12
± 0.3
± 1.5
± 0.75
±2
± 26
± 0.4
± 0.06
2
5
0
AVDD
16
1
± 14
2.5
± 35
2.0
5
5
2.7 to 5.25
58
51
4.0
<1.0
254
310
Unit
Bits min
MHz min
LSB rms typ
LSB rms typ
LSB typ
LSB max
LSB typ
LSB max
LSB typ
LSB typ
Bits Guaranteed
% FSR max
% FSR max
% FSR max
ppm/°C typ
ppm/°C typ
ppm/°C typ
% FSR max
V p-p min
V p-p max
V min
V max
pF typ
V typ
mV max
V typ
mV max
mV max
ktyp
V (± 5% AVDD Operating)
V
mA max
mA typ
mA max
mA typ
mW typ
mW max
–2– REV. E




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