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PDF R7F0C80212ESP Data sheet ( Hoja de datos )
| Número de pieza | R7F0C80212ESP | |
| Descripción | 8-Bit Single-Chip Microcontrollers | |
| Fabricantes | Renesas | |
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8 R7F0C80112ESP, R7F0C80212ESP
User’s Manual: Hardware
8-Bit Single-Chip Microcontrollers
All information contained in these materials, including products and product specifications,
represents information on the product at the time of publication and is subject to change by
Renesas Electronics Corp. without notice. Please review the latest information published by
Renesas Electronics Corp. through various means, including the Renesas Electronics Corp.
website (http://www.renesas.com).
www.renesas.com
Rev.1.00 Sep 2013
1 page  
Conventions
Data significance:
Higher digits on the left and lower digits on the right
Active low representations: ××× (overscore over pin and signal name)
Note:
Footnote for item marked with Note in the text
Caution:
Information requiring particular attention
Remark:
Supplementary information
Numerical representations: Binary
...×××× or ××××B
Decimal
...××××
Hexadecimal ...××××H
Related Documents
The related documents indicated in this publication may include preliminary versions.
However, preliminary versions are not marked as such.
Documents Related to Devices
Document Name
R7F0C80112ESP, R7F0C80212ESP User’s Manual Hardware
RL78 Family Software User’s Manual
Document No.
This manual
R01US0015E
Documents Related to Flash Memory Programming
Document Name
PG-FP5 Flash Memory Programmer User’s Manual
Document No.
R20UT0008E
Caution The related documents listed above are subject to change without notice. Be sure to use the latest
version of each document when designing.
Other Documents
Document Name
Renesas MPUs & MCUs RL78 Family
Semiconductor Device Mount Manual
Quality Grades on NEC Semiconductor Devices
NEC Semiconductor Device Reliability/Quality Control System
Guide to Prevent Damage for Semiconductor Devices by Electrostatic Discharge (ESD)
Semiconductor Reliability Handbook
Document No.
R01CP0003E
Note
C11531E
C10983E
C11892E
R51ZZ0001E
Note See the “Semiconductor Package Mount Manual” website (http://www.renesas.com/products/package/manual/index.jsp).
Caution The related documents listed above are subject to change without notice. Be sure to use the latest
version of each document when designing.
All trademarks and registered trademarks are the property of their respective owners.
EEPROM is a trademark of Renesas Electronics Corporation.
SuperFlash is a registered trademark of Silicon Storage Technology, Inc. in several countries including the United States
and Japan.
Caution: This product uses SuperFlash® technology licensed from Silicon Storage Technology, Inc.
5 Page 
10.3.5 Serial data register 0n (SDR0nH, SDR0nL) ................................................................................. 213
10.3.6 Serial flag clear trigger register 0n (SIR0n) .................................................................................. 214
10.3.7 Serial status register 0n (SSR0n) ................................................................................................. 215
10.3.8 Serial channel start register 0 (SS0)............................................................................................. 217
10.3.9 Serial channel stop register 0 (ST0) ............................................................................................. 218
10.3.10 Serial channel enable status register 0 (SE0) ............................................................................ 219
10.3.11 Serial output enable register 0 (SOE0)....................................................................................... 220
10.3.12 Serial output register 0 (SO0)..................................................................................................... 221
10.3.13 Serial clock output register (CKO0) ............................................................................................ 222
10.3.14 Serial output level register 0 (SOL0) .......................................................................................... 223
10.3.15 Noise filter enable register 0 (NFEN0)........................................................................................ 224
10.3.16 Input switch control register (ISC) .............................................................................................. 225
10.3.17 Port output mode register 0 (POM0) .......................................................................................... 226
10.3.18 Port mode register 0 (PM0) ........................................................................................................ 227
10.4 Operation Stop Mode ............................................................................................................... 228
10.4.1 Stopping the operation by units .................................................................................................... 228
10.4.2 Stopping the operation by channels ............................................................................................. 229
10.5 Operation of 3-Wire Serial I/O (CSI00) Communication........................................................ 230
10.5.1 Master transmission ..................................................................................................................... 231
10.5.2 Master reception........................................................................................................................... 241
10.5.3 Master transmission/reception...................................................................................................... 250
10.5.4 Slave transmission ....................................................................................................................... 260
10.5.5 Slave reception............................................................................................................................. 270
10.5.6 Slave transmission/reception........................................................................................................ 277
10.5.7 Calculating transfer clock frequency............................................................................................. 287
10.5.8 Procedure for processing errors that occurred during 3-wire serial I/O (CSI00) communication... 288
10.6 Operation of UART (UART0) Communication ....................................................................... 289
10.6.1 UART transmission ...................................................................................................................... 290
10.6.2 UART reception............................................................................................................................ 300
10.6.3 Calculating baud rate ................................................................................................................... 307
10.6.4 Procedure for processing errors that occurred during UART (UART0) communication ............... 310
CHAPTER 11 INTERRUPT FUNCTIONS............................................................................................. 311
11.1 Interrupt Function Types ......................................................................................................... 311
11.2 Interrupt Sources and Configuration ..................................................................................... 311
11.3 Registers Controlling Interrupt Functions............................................................................. 315
11.3.1 Interrupt request flag registers (IF0L, IF0H) ................................................................................. 316
11.3.2 Interrupt mask flag registers (MK0L, MK0H) ................................................................................ 317
11.3.3 Priority specification flag registers (PR00L, PR00H, PR10L, PR10H).......................................... 318
11.3.4 External interrupt rising edge enable register (EGP0),
external interrupt falling edge enable register (EGN0)............................................................... 320
Index-6
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