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Número de pieza | BJ8P153 | |
Descripción | (BJ8P153 / BJ8P508) 8-BIT MICRO-CONTROLLER | |
Fabricantes | ETC | |
Logotipo | ||
Hay una vista previa y un enlace de descarga de BJ8P153 (archivo pdf) en la parte inferior de esta página. Total 54 Páginas | ||
No Preview Available ! BJ8P508/153
OTP ROM
BJ8P508/153
8-BIT MICRO-CONTROLLER
Version 2.0
Free Datasheet http://www.datasheet4u.com/
1 page BJ8P508/153
OTP ROM
* 8 pin SOP 150mil: 8P508ANJ
14 pins SOP, PDIP
* 14 pin DIP 300mil: BJ8P153APJ,
* 14 pin SOP 150mil: BJ8P153SNJ
The names in BJX’s ERP are BJ8P508APJ,8P508ANJ,BJ8P153APJ/78P153SPJ,BJ8P153SNJ.
• The transient point of system frequency between HXT and LXT is around 400KHz.
This specification is subject to change without prior notice.
5
6.17.2007 (V2.0)
Free Datasheet http://www.datasheet4u.com/
5 Page BJ8P508/153
OTP ROM
4. R3 (Status Register)
765 432 10
RST
GP1
GP0
T
P
Z DC C
• Bit 7 (RST) Bit for reset type.
Set to 1 if wake-up from sleep mode on pin change
Set to 0 if wake up from other reset types
• Bit6 ~ 5 (GP1 ~ 0) General purpose read/write bits.
• Bit 4 (T) Time-out bit.
Set to 1 with the "SLEP" and "WDTC" command, or during power up and reset to
by WDT
time-out.
• Bit 3 (P) Power down bit.
Set to 1 during power on or by a "WDTC" command and reset to 0 by a "SLEP" command.
• Bit 2 (Z) Zero flag.
Set to "1" if the result of an arithmetic or logic operation is zero.
• Bit 1 (DC) Auxiliary carry flag
• Bit 0 (C) Carry flag
5. R4 (RAM Select Register)
• Bits 7 ~ 6 are general-purpose read/write bits.
See the configuration of the data memory in Fig. 4.
• Bits 5 ~ 0 are used to select registers (address: 00~06, 0F~2F) in the indirect addressing mode.
6. R5 ~ R6 (Port 5 ~ Port 6)
• R5 and R6 are I/O registers.
• Only the lower 4 bits of R5 are available.
• The upper 4 bits of R5 are fixed to 0.
• P63 is input only.
7. RF (Interrupt Status Register)
765 432 10
- - - - - EXIF ICIF TCIF
“1” means interrupt request, and “0” means no interrupt occurs.
• Bits 7 ~ 3 Not used.
• Bit 2 (EXIF) External interrupt flag. Set by falling edge on /INT pin, reset by software.
• Bit 1 (ICIF) Port 6 input status changed interrupt flag. Set when Port 6 input changes, reset by
software.
• Bit 0 (TCIF) TCC overflowing interrupt flag. Set when TCC overflows, reset by software.
This specification is subject to change without prior notice.
11
6.17.2007 (V2.0)
Free Datasheet http://www.datasheet4u.com/
11 Page |
Páginas | Total 54 Páginas | |
PDF Descargar | [ Datasheet BJ8P153.PDF ] |
Número de pieza | Descripción | Fabricantes |
BJ8P153 | (BJ8P153 / BJ8P508) 8-BIT MICRO-CONTROLLER | ETC |
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