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STMicroelectronics |
www.DataSheet4U.com
STE2007
96 x 68 Single-chip LCD controller/driver
Features
■ 68 x 96 bits Display Data RAM
■ 33,49, 65 and 68 Lines mode
■ Row by row scrolling
■ Interfaces
– 3-lines Serial Interface (read and write)
– I2C (read and write)
– 4-Line serial (read and write)
■ Partial display mode (33,25,17,9 lines mode)
■ Fully integrated oscillator that requires no
external components
■ CMOS compatible inputs
■ Programmable ID-Number
■ Programmable Bias Ratio
■ Programmable columns organization
■ Fully integrated configurable LCD bias voltage
generator with:
– Selectable multiplication factor
(3x, 4X and 5X)
– Effective sensing for high precision output
– Eight selectable temperature compensation
coefficients
■ Designed for chip-on-glass (COG) applications
■ Low power consumption, suitable for battery
operated systems
■ Interfaces supply voltage range from 1.6 to
3.6V
■ High voltage generator supply voltage range
from 2.4 to 3.6V
■ Display supply voltage range from 3 to 13.2V
Description
The STE2007 is a low power LCD driver, capable
to drive 96 columns and up to 68 lines, designed
for monochrome displays.
The STE2007 includes fully integrated bias
voltage generator (up to 5x multiplication factor),
and internal oscillator, thus reducing to minimum
the number of external components required and
the current consumption.
The STE2007 features the three standard serial
interfaces (3 and 4 lines serial, I2C interface).
December 2006
Rev 3
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Content
Content
STE2007
www.DataSheet4U.com
1 Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
2 Driver pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.1 CPU interface pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.2 Power supply pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
2.3 Configuration pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.4 Test pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
3 Display driver electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . 10
3.1 Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
3.2 DC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
3.3 AC Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.4 MCU Tx Data Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
3.5 Driver TxData Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
3.5.1 Reset timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14
4 Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1 3-lines 9 bit Serial Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1.1 MCU TxData Mode (Write Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.1.2 Driver TxData Mode (Read Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17
4.2 4-Line SPI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2.1 MCU TxData Mode (Write Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
4.2.2 Driver TxData Mode (Read Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.3 I2C Bus . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21
4.3.1 Communication protocol . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.3.2 Starting the communication . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
4.3.3 MCU TxData Mode (Write Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24
4.3.4 Driver TxData Mode (Read Mode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25
4.4 Reading mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
4.4.1 IIdentification byte . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26
5 Display Data RAM (DDRAM) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
5.1 DDRAM and Page/column address circuit . . . . . . . . . . . . . . . . . . . . . . . . 27
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