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Número de pieza | MTV212M64 | |
Descripción | 8051 Embedded Monitor Controller MTP Type | |
Fabricantes | Myson | |
Logotipo | ||
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MYSON
TECHNOLOGY
MTV212M64
(Rev. 1.2)
8051 Embedded Monitor Controller
MTP Type
FEATURES
• 8051 core, 12MHz operating frequency.
• 1024-byte RAM, 64K-byte program Flash-ROM.•
• Maximum 14 channels of 9V open-drain PWM DAC.
• Maximum 32 bi-directional I/O pins.
• SYNC processor for composite separation/insertion, H/V polarity/frequency check, polarity adjustment
and programmable clamp pulse output.
• Built-in self-test pattern generator with three free-running timings.
• Built-in low power reset circuit.
• Compliant with VESA DDC1/2B/2Bi/2B+ standard.
• Dual slave IIC addresses.
• Single master IIC interface for internal device communication.
• 4-channel 6-bit ADC.
• Watchdog timer with programmable interval.
• Compliant with Low Speed USB Spec.1.1 including 2 Endpoints: one is Control endpoint (8-byte IN & 8-
byte OUT FIFOs), the other one is Interrupt endpoint (8-byte IN FIFO).
• Built-in 3.3V regulator for USB Interface.
• 40-pin DIP, 42-pin SDIP or 44-pin PLCC package.
GENERAL DESCRIPTIONS
The MTV212M micro-controller is an 8051 CPU core embedded device specially tailored to Monitor
applications. It includes an 8051 CPU core, 1024-byte SRAM, SYNC processor, 14 built-in PWM DACs,
VESA DDC interface, 4-channel A/D converter, Low Speed USB Interface and a 64K-byte internal program
Flash-ROM.
BLOCK DIAGRAM
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification without
notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the product.
Revision 1.2
- 1 - 2000/07/04
1 page MYSON
TECHNOLOGY
MTV212M64
(Rev. 1.2)
FUNCTIONAL DESCRIPTIONS
1. 8051 CPU Core
MTV212M includes all 8051 functions with the following exceptions:
1.1 PSEN, ALE, RD and WR pins are disabled. The external RAM access is restricted to XFRs within the
MTV212M.
1.2 Port0, port3.3, port3.6 and port3.7 are not general-purpose I/O ports. They are dedicated to monitor
special application.
1.3 INT1 input pin is not provided, it is connected to special interrupt sources.
1.4 Port2 are shared with special function pins.
In addition, there are 2 timers, 5 interrupt sources and serial interface compatible with the standard 8051.
Note: All registers listed in this document reside in external RAM area (XFR). For internal RAM memory map
please refer to 8051 spec.
2. Memory Allocation
2.1 Internal Special Function Registers (SFR)
The SFR is a group of registers that are the same as standard 8051.
2.2 Internal RAM
There are total 256 bytes internal RAM in MTV212M, same as standard 8052.
2.3 External Special Function Registers (XFR)
The XFR is a group of registers allocated in the 8051 external RAM area 00h - 7Fh. Most of the registers are
used for monitor control or PWM DAC. Program can initialize Ri value and use "MOVX" instruction to access
these registers.
2.4 Auxiliary RAM (AUXRAM)
There are total 768 bytes auxiliary RAM allocated in the 8051 external RAM area 80h - FFh. The AUXRAM is
divided into six banks, selected by XBANK register. Program can initialize Ri value and use "MOVX"
instruction to access the AUXRAM.
FFh Internal RAM
SFR
Accessible by
indirect
addressing only
(Using
MOV A,@Ri
instruction)
80h
7Fh Internal RAM
Accessible by
direct addressing
Accessible by
direct and indirect
addressing
00h
Revision 1.2
- 5 - 2000/07/04
5 Page MYSON
TECHNOLOGY
Display Region
MTV212M64
(Rev. 1.2)
Positive cross-hatch
Negative cross-hatch
Full white
Full black
Revision 1.2
- 11 -
2000/07/04
11 Page |
Páginas | Total 27 Páginas | |
PDF Descargar | [ Datasheet MTV212M64.PDF ] |
Número de pieza | Descripción | Fabricantes |
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