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PDF ND7060 Data sheet ( Hoja de datos )

Número de pieza ND7060
Descripción Multi Format Flash Card Reader / Write Controller
Fabricantes NeoDio 
Logotipo NeoDio Logotipo



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No Preview Available ! ND7060 Hoja de datos, Descripción, Manual

ND7060
ND7060
A Multi-Format Flash Card Reader/Writer
Controller for Embedded Applications Specification
Neodio Technologies Corporation
4F, No.176, Chien-Yi Rd., Chung-Ho
Taipei Hsien, 235, Taiwan
TEL: 886-2-8227-1525
FAX: 886-2-8227-1530
Copyright © 2002~2004 Neodio Technologies Corporation
All rights reserved.
The information contained herein is subjected to change without notice.
Preliminary spec V1.0
1
04/06/11
The above information is the exclusive intellectual property of Neodio Technologies Corporation and shall not be disclosed, distributed
without permission from Neodio.

1 page




ND7060 pdf
Block Diagram
PCMCIA
/ IDE
interface
PCMCIA
/ IDE
controller
SRAM
DMA
Controller
I2 C
&
SPI
Circuit
GPIO
P17~P10
P37~P30
P47~P40
Clock
Control &
Power
Management
Unit
SFR
RAM
Program
ROM
DMA
SRAM
N8052
Enhanced
MCU
ND7060
SmartMedia/
xD
Interface
Memory
Stick
(PRO)
Interface
SD/MMC
Interface
CF/ATA
Interface
Pin Descriptions
Pin No.
Pin66, Pin65
Name
I/O Descriptions
HCE1_N,
1.Host mode: PCMCIA
HCE2_N
I HCE1_N and HCE2_N are low active card select signals.
(PC Card
Even/Word/Odd byte mode is defined by combination of
Memory mode)
HCE1_N, HCE2_N and HA0.
HCE1_N,
HCE2_N
(PC Card I/O
mode)
HCS0_N,
HCS1_N
(True IDE
mode)
I
I
These signals the same as PC Card Memory mode
CS1_N is used for select the Alternate Status Register and the
Device Control Register while CS0_N is the chip select for the
other task file registers.
HCS0_N,
HCS1_N
I 2.Host mode: IDE
CS1_N is used for select the Alternate Status Register and the
Device Control Register while CS0_N is the chip select for the
other task file registers.
Preliminary spec V1.0
5
04/06/11
The above information is the exclusive intellectual property of Neodio Technologies Corporation and shall not be disclosed, distributed
without permission from Neodio.

5 Page





ND7060 arduino
Pin93
Pin33
Pin34
Pin35
ND7060
HATASEL
I
HWE_N
I
(PC Card
Memory mode)
2.Host mode: IDE
To enable True IDE mode this input should be ground by the
host.
1.Host mode: PCMCIA
HWE_N is used for the control of writing register’s data in
attribute memory area or task file area.
HWE_N
(PC Card
I/O mode)
I
HWE_N is used for the control of writing register’s data in
attribute memory area.
None
(True IDE
mode)
I This input signal is not used and should be connected to VCC
by the host.
SALE
MCMD
FA0
SALE
MCMD
SCLE
FA1
SCLE
BS
FA2
BS
O 1.Host mode: PCMCIA
a.) NAND-type Flash/Smart Media address latch enable
b.) SD/MMC card Command signal.
O 2.Host mode: IDE
a.) Compact Flash/IDE address bus [0]: It is asserted to
access a register or data port in the Compact Flash/IDE
device.
b.) NAND-type Flash/Smart Media address latch enable
c.) SD/MMC card Command signal.
O 1.Host mode: PCMCIA
NAND-type Flash/Smart Media command latch enable
O 2.Host mode: IDE
a.) Compact Flash/IDE address bus [1]: It is asserted to
access a register or data port in the Compact Flash/IDE
device.
b.) NAND-type Flash/Smart Media command latch enable
O 1.Host mode: PCMCIA
Memory Stick serial protocol bus state signal.
O 2.Host mode: IDE
a.) Compact Flash/IDE address bus [2]: It is asserted to
access a register or data port in the Compact Flash/IDE
device.
b.) Memory Stick serial protocol bus state signal.
Preliminary spec V1.0
11
04/06/11
The above information is the exclusive intellectual property of Neodio Technologies Corporation and shall not be disclosed, distributed
without permission from Neodio.

11 Page







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