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Myson |
MYSON
TECHNOLOGY
MTV012E
8051 Embedded CRT Monitor Controller
OTP Version
FEATURES
8051 core.
256 bytes internal RAM.
8K bytes program EPROM.
14 channels 12V open drain PWM DAC, 10 dedicated channels and 4 channels shared with I/O pin.
20 bi-direction I/O pin, 12 dedicated pin, 4 shared with DAC, 4 shared with DDC/IIC interface.
3 output pin shared with H/V sync output and self test output pins.
SYNC processor for composite separation, polarity and frequency check, and polarity adjust.
Built-in monitor self test pattern generator.
Built-in Low Power Reset circuit.
IIC interface for DDC1/DDC2B and EEPROM, only one EEPROM needed to store DDC1/DDC2B and
display mode information.
Watch dog timer with programmable interval.
40 pin PDIP package.
GENERAL DESCRIPTION
The MTV012E micro-controller is an 8051 CPU core-embedded device specially tailored to CRT monitor
applications. It includes an 8051 CPU core, 256-byte SRAM, 14 built-in PWM DACs, DDC1/DDC2B
interface, 24Cxx series EEPROM interface and an 8K-byte internal program EPROM.
BLOCK DIAGRAM
P1.0-7
P0.0-7
RD
X1 WR
8051
X2 CORE INT1
P2.0-3
RST
P3.0-P3.2 P3.4 P2.4-7
P0.0-7
RD
WR
XFR
WATCH-DOG
TIMER
RST
STOUT
HSYNC
H/VSYNC VSYNC
CONTROL HBLANK
VBLANK
14 CHANNEL DA0-9
PWM DAC
DA10-13
HSCL
HSDA
DDC 1/2 B & FIFO
INTERFACE
ISCL
IIC INTERFACE
ISDA
This datasheet contains new product information. Myson Technology reserves the rights to modify the product specification
without notice. No liability is assumed as a result of the use of this product. No rights under any patent accompany the sale of the
product.
1/14
MTV012E Revision 1.2 12/23/1998
MYSON
TECHNOLOGY
1.0 PIN CONNECTION
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
HSCL/P3.0/Rxd
HSDA/P3.1/Txd
ISDA/P3.2/INT0
HSYNC
ISCL/P3.4/T0
VSYNC
HBLANK/P4.1
VBLANK/P4.0
X2
X1
VSS
MTV012E
MTV012E
VDD
DA0
DA1
DA2
DA3
DA4
DA5
DA6
DA7
DA8
DA9
STOUT/P4.2
DA10/P2.7
DA11/P2.6
DA12/P2.5
DA13/P2.4
P2.3
P2.2
P2.1
P2.0/INT0
2.0 PIN DESCRIPTION
Name
P1.0
P1.1
P1.2
P1.3
P1.4
P1.5
P1.6
P1.7
RST
HSCL/P3.0/Rxd
HSDA/P3.1/Txd
ISDA/P3.2/INT0
HSYNC
ISCL/P3.4/T0
VSYNC
HB L ANK /P4.1
VB L ANK /P4.0
X2
X1
VSS
P2.0/INT0
Type
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I
I/O
I/O
I/O
I
I/O
I
O
O
O
I
-
I/O
Pin#
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
Description
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
General purpose I/O
Active high reset
IIC clock / General purpose I/O / Rxd
IIC data / General purpose I/O / Txd
IIC data / General purpose I/O / INT0
Horizontal SYNC or composite SYNC
IIC clock / General purpose I/O / T0
Vertical SYNC
Horizontal blank / General purpose output
Vertical blank / General purpose output
Oscillator output
Oscillator input
Ground
General purpose I/O / INT0
2/14
MTV012E Revision 1.2 12/23/1998
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