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PDF T89C51CC02 Data sheet ( Hoja de datos )
| Número de pieza | T89C51CC02 | |
| Descripción | Enhanced 8-bit Microcontroller | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 80C51 Core Architecture
• 256 Bytes of On-chip RAM
• 256 Bytes of On-chip XRAM
• 16K Bytes of On-chip Flash Memory
– Data Retention: 10 Years at 85°C
– Erase/Write Cycle: 100K
• Boot Code Section with Independent Lock Bits
• 2K Bytes of On-chip Flash for Bootloader
• In-System Programming by On-Chip Boot Program (CAN, UART) and IAP Capability
• 2K Bytes of On-chip EEPROM
– Erase/Write Cycle: 100K
• 14-sources 4-level Interrupts
• Three 16-bit Timers/Counters
• Full Duplex UART Compatible 80C51
• Maximum Crystal Frequency 40 MHz. In X2 Mode, 20 MHz (CPU Core, 40 MHz)
• Three or Four Ports: 16 or 20 Digital I/O Lines
• Two-channel 16-bit PCA
– PWM (8-bit)
– High-speed Output
– Timer and Edge Capture
• Double Data Pointer
• 21-bit Watchdog Timer (7 Programmable bits)
• A 10-bit Resolution Analog-to-Digital Converter (ADC) with 8 Multiplexed Inputs
• Full CAN Controller
– Fully Compliant with CAN rev.# 2.0A and 2.0B
– Optimized Structure for Communication Management (Via SFR)
– 4 Independent Message Objects
-Each Message Object Programmable on Transmission or Reception
-Individual Tag and Mask Filters up to 29-bit Identifier/Channel
-8-byte Cyclic Data Register (FIFO)/Message Object
-16-bit Status and Control Register/Message Object
-16-bit Time-Stamping Register/Message Object
-CAN Specification 2.0 Part A or 2.0 Part B Programmable for Each Message
Object
-Access to Message Object Control and Data Registers Via SFR
-Programmable Reception Buffer Length up to 4 Message Objects
-Priority Management of Reception of Hits on Several Message Objects
Simultaneously (Basic CAN Feature)
-Priority Management for Transmission
-Message Object Overrun Interrupt
– Supports
-Time Triggered Communication
-Autobaud and Listening Mode
-Programmable Automatic Reply Mode
• 1-Mbit/s Maximum Transfer Rate at 8 MHz(1) Crystal Frequency In X2 Mode
• Readable Error Counters
• Programmable Link to On-chip Timer for Time Stamping and Network Synchronization
• Independent Baud Rate Prescaler
• Data, Remote, Error and Overload Frame Handling
• Power-saving Modes
– Idle Mode
– Power-down Mode
• Power Supply: 3 Volts to 5.5 Volts
• Temperature Range: Industrial (-40° to +85°C)
• Packages: SOIC28, SOIC24, PLCC28, VQFP32
Note: 1. At BRP = 1 sampling point will be fixed.
Enhanced 8-bit
Microcontroller
with CAN
Controller and
Flash
T89C51CC02
AT89C51CC02
Rev. 4126L–CAN–01/08
1 page  
AT/T89C51CC02
Pin Description
Pin Name
VSS
VCC
VAREF
VAVCC
VAGND
P1.0:7
P2.0:1
Type
GND
I/O
I/O
Description
Circuit ground
Supply Voltage
Reference Voltage for ADC (input)
Supply Voltage for ADC
Reference Ground for ADC (internaly connected with the VSS)
Port 1:
Is an 8-bit bi-directional I/O port with internal pull-ups. Port 1 pins can be used for digital input/output or as
analog inputs for the Analog Digital Converter (ADC). Port 1 pins that have 1’s written to them are pulled
high by the internal pull-up transistors and can be used as inputs in this state. As inputs, Port 1 pins that
are being pulled low externally will be the source of current (IIL, See section ’Electrical Characteristic’)
because of the internal pull-ups. Port 1 pins are assigned to be used as analog inputs via the ADCCF
register (in this case the internal pull-ups are disconnected).
As a secondary digital function, port 1 contains the Timer 2 external trigger and clock input; the PCA
external clock input and the PCA module I/O.
P1.0/AN0/T2
Analog input channel 0,
External clock input for Timer/counter2.
P1.1/AN1/T2EX
Analog input channel 1,
Trigger input for Timer/counter2.
P1.2/AN2/ECI
Analog input channel 2,
PCA external clock input.
P1.3/AN3/CEX0
Analog input channel 3,
PCA module 0 Entry of input/PWM output.
P1.4/AN4/CEX1
Analog input channel 4,
PCA module 1 Entry of input/PWM output.
P1.5/AN5
Analog input channel 5,
P1.6/AN6
Analog input channel 6,
P1.7/AN7
Analog input channel 7,
It can drive CMOS inputs without external pull-ups.
Port 2:
Is an 2-bit bi-directional I/O port with internal pull-ups. Port 2 pins that have 1’s written to them are pulled
high by the internal pull-ups and can be used as inputs in this state. As inputs, Port 2 pins that are being
pulled low externally will be a source of current (IIL, on the datasheet) because of the internal pull-ups.
In the T89C51CC02 Port 2 can sink or source 5mA. It can drive CMOS inputs without external pull-ups.
4126L–CAN–01/08
5
5 Page 
AT/T89C51CC02
Table 4. Timers SFRs (Continued)
Mnemonic Add Name
T2CON
C8h
Timer/Counter 2
control
T2MOD
C9h
Timer/Counter 2
Mode
RCAP2H
Timer/Counter 2
CBh Reload/Capture High
byte
RCAP2L
Timer/Counter 2
CAh Reload/Capture Low
byte
WDTRST
A6h
WatchDog Timer
Reset
WDTPRG
A7h
WatchDog Timer
Program
7
TF2
6
EXF2
5
RCLK
4
TCLK
3
EXEN2
2
TR2
S2
1
C/T2#
0
CP/RL2#
T2OE
DCEN
S1 S0
Table 5. Serial I/O Port SFRs
Mnemonic Add Name
765432
SCON
98h Serial Control
FE/SM0
SM1
SM2
REN
TB8
RB8
SBUF
99h Serial Data Buffer
SADEN
B9h Slave Address Mask
SADDR
A9h Slave Address
1
TI
0
RI
Table 6. PCA SFRs
Mnemonic Add Name
CCON
D8h
PCA Timer/Counter
Control
CMOD
D9h
PCA Timer/Counter
Mode
CL
E9h
PCA Timer/Counter
Low byte
CH
F9h
PCA Timer/Counter
High byte
CCAPM0
CCAPM1
PCA Timer/Counter
DAh Mode 0
DBh PCA Timer/Counter
Mode 1
CCAP0H
CCAP1H
PCA Compare
FAh Capture Module 0 H
FBh PCA Compare
Capture Module 1 H
7
CF
CIDL
6
CR
543210
CCF4
CCF3
CCF2
CCF1
CCF0
CPS1
CPS0
ECF
ECOM0
ECOM1
CAPP0
CAPP1
CAPN0
CAPN1
MAT0
MAT1
TOG0
TOG1
PWM0
PWM1
ECCF0
ECCF1
CCAP0H7 CCAP0H6 CCAP0H5 CCAP0H4 CCAP0H3 CCAP0H2 CCAP0H1 CCAP0H0
CCAP1H7 CCAP1H6 CCAP1H5 CCAP1H4 CCAP1H3 CCAP1H2 CCAP1H1 CCAP1H0
4126L–CAN–01/08
11
11 Page | ||
| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet T89C51CC02.PDF ] | |
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