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PDF W90N740CDG Data sheet ( Hoja de datos )
| Número de pieza | W90N740CDG | |
| Descripción | Microcontroller | |
| Fabricantes | nuvoton | |
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W90N740CDG
DATA SHEET
NUVOTON
32-BIT ARM7TDMI-BASED
MICRO-CONTROLLER
The information described in this document is the exclusive intellectual property of
Nuvoton Electronics Corporation and shall not be reproduced without permission from Nuvoton.
Nuvoton is providing this document only for reference purposes of W90N740-based system design. Nuvoton
assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.
For additional information or questions, please contact: Nuvoton Electronics Corp.
Publication Release Date: September. 19, 2005
- I - Revision A7
1 page  
W90N740CDG
External Bus Interface (EBI)
• External I/O Control with 8/16/32 bit external data bus
• Cost-effective memory-to-peripheral DMA interface
• SDRAM Controller supports up to 2 external SDRAM & the maximum size of each device is 32MB
• ROM/FLASH & External I/O interface
• Support for PCMCIA 16-bit PC Card devices
On-Chip Instruction and Data Cache
• Two-way, Set-associative, 8K-byte I-cache and 2K-byte D-cache
• Support for LRU (Least Recently Used) Protocol
• Cache can be configured as an internal SRAM
• Support Cache Lock function
Ethernet MAC Controller (EMC)
• IEEE 802.3 protocol engine with programmable MII or RMII interface for 10/100 Mbits/s
• DMA engine with burst mode
• 256 bytes transmit & 256 bytes receive FIFO for MAC protocol engine and DMA access
• Built-in 16 entry CAM Address Register
• Support long frame (more than 1518 bytes) and short frame (less than 64 bytes)
• Re-transmit (during collision) the frame without DMA access
• Half or full duplex function option
• Support Station Management for external PHY
• On-Chip Pad generation
NAT Accelerator (Patent Pending)
• Hardware acceleration on IP address / port number look up and replacement for network address
translation, including MAC address translation
• Provide 64 entries of translation table
• Support TCP / UDP packets
GDMA Controller
• 2 Channel GDMA for memory-to-memory data transfers without CPU intervention
• Increase or decrease source / destination address in 8-bit, 16-bit, or 32-bit data transfers
• Supports 4-data burst mode to boost performance
• Support external GDMA request
-2-
5 Page 
W90N740CDG
Table 4 W90N740 Pins Assignment, continued
NAME
USB Interface
DP
DN
Miscellaneous
GP [20:17] / nIRQ [3:0]
GP16 / nXDREQ
GP15 /nXDACK
GP14 /
TIMER1/ SPEED
GP13 /
TIMER0/ STDBY
GP12 /nWDOG
GP11 /RxD
GP10 /TxD
GP9/nDSR/nTOE
GP8 /nDTR/FSE0
GP7 /nCD / VO
GP6 /nCTS/ VM
GP5 /nRTS/ VP
GP4 /nRI / RCV
GP [3:0]
Power/Ground
VDD18
VSS18
VDD33
VSS33
USBVDD
USBVSS
DVDD18
DVSS18
AVDD18
AVSS18
131
130
136-133
29
28
176-PIN LQFP
( 2 pins )
( 21 pins )
19
18
17
140
139
128
127
126
138
137
125
16-13
(32 pins)
22, 69, 113, 155
23, 68, 112, 156
12, 33, 53, 71, 85,
100, 116, 141, 162
9, 35, 55, 73, 87, 102, 118, 145, 165
132
129
175
176
173
174
-8-
11 Page | ||
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| PDF Descargar | [ Datasheet W90N740CDG.PDF ] | |
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