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HCPL-073L 반도체 회로 부품 판매점

Low Input Current High Gain LVTTL/LVCMOS Compatible 3.3 V Optocouplers



ETC 로고
ETC
HCPL-073L 데이터시트, 핀배열, 회로
Agilent HCPL-270L/ 070L/273L/073L
Low Input Current High Gain
LVTTL/LVCMOS Compatible
3.3 V Optocouplers
Data Sheet
Description
These high gain series couplers use
a Light Emitting Diode and an
integrated high gain photodetector
to provide extremely high current
transfer ratio between input and
output. Separate pins for the
photodiode and output stage result
in LVTTL compatible saturation
voltages and high speed operation.
Where desired, the VCC and VO
terminals may be tied together to
achieve conventional photo-
darlington operation. A base
access terminal allows a gain
bandwidth adjustment to be
made.
These optocouplers are for use in
LVTTL/LVCMOS or other low
power applications. A 400%
minimum current transfer ratio is
guaranteed over 0 to +70˚C
operating range for only 0.5 mA
of LED current.
Functional Diagram
HCPL-270L/070L
NC 1
ANODE 2
8 VCC
7 VB
CATHODE 3
NC 4
6 VO
5 GND
HCPL-273L/073L
ANODE 1 1
CATHODE 1 2
CATHODE 2 3
ANODE 2 4
8 VCC
7 VO1
6 VO2
5 GND
Features
• Low power consumption
• High current transfer ratio
• Low input current requirements –
0.5 mA
• LVTTL/LVCMOS compatible output
• Performance guaranteed over
temperature 0˚C to +70˚C
• Base access allows gain
bandwidth adjustment
• High output current – 60 mA
• Safety approval, UL, VDE, CSA
(pending)
Applications
• Ground isolate most logic
families – LVTTL/LVCMOS
• Low input current line receiver
• High voltage insulation
• EIA RS-232C line receiver
• Telephone ring detector
• 117 V AC line voltage status
indicator – low input power
dissipation
• Low power systems – ground
isolation
TRUTH TABLE
LED
ON
OFF
VO
LOW
HIGH
SHIELD
A 0.1 µF bypass capacitor connected between pins 8 and 5 is recommended.
CAUTION: It is advised that normal static precautions be taken in handling and assembly of this component to prevent
damage and/or degradation which may be induced by ESD.


HCPL-073L 데이터시트, 핀배열, 회로
The HCPL-070L and HCPL-073L
are surface mount devices
packaged in an industry standard
SOIC-8 footprint.
The SOIC-8 does not require
"through holes" in a PCB. This
package occupies approximately
one-third the footprint area of the
standard dual-in-line package.
The lead profile is designed to be
compatible with standard surface
mount processes.
Ordering Information
Specify Part Number followed by Option Number (if desired).
Example:
HCPL-270L #XXX
060 = VDE 0884 VIORM = 630 Vpeak Option
500 = Tape and Reel Packaging Option
Option data sheets available. Contact your Agilent sales representative
or authorized distributor for information.
Selection Guide
8-Pin DIP (300 Mil)
Single Channel
Package HCPL-
Dual Channel
Package HCPL-
270L 273L
Small Outline SO-8
Single Channel
Package HCPL-
Dual Channel
Package HCPL-
070L 073L
Minimum Input
ON Current (IF)
0.5 mA
1.6 mA
Minimum CTR
400%
300%
Schematic
2
ANODE
+
VF
CATHODE
3
IF
SHIELD
HCPL-270L/HCPL-070L
VCC
8
ICC
IB
7
VB
1 IF1
+
VF1
2
ICC
VCC
8
IO1
VO1
7
IO 6
VO
5
GND
3 IF2
VF2
+
4
IO2
VO2
6
SHIELD
GND
5
USE OF A 0.1 µF BYPASS CAPACITOR CONNECTED
BETWEEN PINS 5 AND 8 IS RECOMMENDED
HCPL-273L/HCPL-073L
2




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