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PDF KH29LV800CB Data sheet ( Hoja de datos )
| Número de pieza | KH29LV800CB | |
| Descripción | 8M-Bit CMOS Single Voltage 3V Only Flash Memory | |
| Fabricantes | Macronix | |
| Logotipo |  |
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Hay una vista previa y un enlace de descarga de KH29LV800CB (archivo pdf) en la parte inferior de esta página. Total 60 Páginas | ||
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KH29LV800C T/B
FEATURES
8M-BIT [1Mx8/512K x16] CMOS SINGLE VOLTAGE
3V ONLY FLASH MEMORY
• Extended single - supply voltage range 2.7V to 3.6V
• 1,048,576 x 8/524,288 x 16 switchable
• Single power supply operation
- 3.0V only operation for read, erase and program
operation
• Fast access time: 70/90ns
• Low power consumption
- 20mA maximum active current
- 0.2uA typical standby current
• Command register architecture
- Byte/word Programming (9us/11us typical)
- Sector Erase (Sector structure 16K-Bytex1,
8K-Bytex2, 32K-Bytex1, and 64K-Byte x15)
• Auto Erase (chip & sector) and Auto Program
- Automatically erase any combination of sectors with
Erase Suspend capability
- Automatically program and verify data at specified
address
• Erase suspend/Erase Resume
- Suspends sector erase operation to read data from,
or program data to, any sector that is not being erased,
then resumes the erase
• Status Reply
- Data# polling & Toggle bit for detection of program
and erase operation completion.
• Ready/Busy# pin (RY/BY#)
- Provides a hardware method of detecting program or
erase operation completion
• Sector protection
- Hardware method to disable any combination of
sectors from program or erase operations
- Temporary sector unprotected allows code changes
in previously locked sectors
• CFI (Common Flash Interface) compliant
- Flash device parameters stored on the device and
provide the host system to access
• 100,000 minimum erase/program cycles
• Latch-up protected to 100mA from -1V to VCC+1V
• Boot Sector Architecture
- T = Top Boot Sector
- B = Bottom Boot Sector
• Package type:
- 48-pin TSOP
- All Pb-free devices are RoHS Compliant
• Compatibility with JEDEC standard
- Pinout and software compatible with single-power
supply Flash
• 10 years data retentionwww.DataSheet.co.kr
GENERAL DESCRIPTION
The KH29LV800C T/B is a 8-mega bit Flash memory
organized as 1M bytes of 8 bits or 512K words of 16
bits. MXIC's Flash memories offer the most cost-effec-
tive and reliable read/write non-volatile random access
memory. The KH29LV800C T/B is packaged in 48-pin
TSOP. It is designed to be reprogrammed and erased in
system or in standard EPROM programmers.
The standard KH29LV800C T/B offers access time as
fast as 55ns, allowing operation of high-speed micropro-
cessors without wait states. To eliminate bus conten-
tion, the KH29LV800C T/B has separate chip enable
(CE#) and output enable (OE#) controls.
MXIC's Flash memories augment EPROM functionality
with in-circuit electrical erasure and programming. The
KH29LV800C T/B uses a command register to manage
this functionality. The command register allows for 100%
TTL level control inputs and fixed power supply levels
during erase and programming, while maintaining maxi-
mum EPROM compatibility.
MXIC Flash technology reliably stores memory contents
even after 100,000 erase and program cycles. The MXIC
cell is designed to optimize the erase and programming
mechanisms. In addition, the combination of advanced
tunnel oxide processing and low internal electric fields
for erase and program operations produces reliable cy-
cling. The KH29LV800C T/B uses a 2.7V~3.6V VCC
supply to perform the High Reliability Erase and auto
Program/Erase algorithms.
The highest degree of latch-up protection is achieved
with MXIC's proprietary non-epi process. Latch-up pro-
tection is proved for stresses up to 100 milliamperes on
address and data pin from -1V to VCC + 1V.
P/N:PM1222
REV. 1.2, DEC. 09, 2005
1
Datasheet pdf - http://www.DataSheet4U.net/
1 page  
BLOCK DIAGRAM
KH29LV800C T/B
CE#
OE#
WE#
RESET#
CONTROL
INPUT
LOGIC
PROGRAM/ERASE
HIGH VOLTAGE
WRITE
STATE
MACHINE
(WSM)
A0-A18
ADDRESS
LATCH
AND
BUFFER
FLASH
ARRAY
ARRAY
SOURCE
HV
Y-PASS GATEwww.DataSheet.co.kr
STATE
REGISTER
COMMAND
DATA
DECODER
SENSE
AMPLIFIER
PGM
DATA
HV
PROGRAM
DATA LATCH
COMMAND
DATA LATCH
Q0-Q15/A-1
I/O BUFFER
P/N:PM1222
REV. 1.2, DEC. 09, 2005
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Datasheet pdf - http://www.DataSheet4U.net/
5 Page 
KH29LV800C T/B
COMMAND DEFINITIONS
Device operations are selected by writing specific ad-
dress and data sequences into the command register.
Writing incorrect address and data values or writing them
in the improper sequence will reset the device to the
read mode. Table 5 defines the valid register command
sequences. Note that the Erase Suspend (B0H) and
Erase Resume (30H) commands are valid only while the
Sector Erase operation is in progress.
TABLE 6. KH29LV800C T/B BUS OPERATION
ADDRESS
Q8~Q15
DESCRIPTION
CE# OE# WE# RESET# A18 A10 A9 A8 A6 A5 A1 A0 Q0~Q7 BYTE BYTE
A12 A11
A7
A2
=VIH =VIL
Read
L LH H
AIN
Dout Dout Q8~Q14
=High Z
Q15=A-1
Write
LHL H
AIN
DIN(3) DIN
Reset
XXX L
X
High Z High Z High Z
Temporary sector unlock X X X VID
AIN
DIN DIN High Z
Output Disable
L HH H
www.DataSheet.co.kr
X
High Z High Z High Z
Standby
Vcc± X X Vcc±
X
High Z High Z High Z
0.3V
0.3V
Sector Protect
L H L VID SA X X X L X H L DIN
X
X
Chip Unprotected
L H L VID X X X X H X H L DIN
X
X
Sector Protection Verify L L H H SA X VID X L X H L CODE(5) X
X
NOTES:
1. Manufacturer and device codes may also be accessed via a command register write sequence. Refer to Table 5.
2. VID is the Silicon-ID-Read high voltage, 11.5V to 12.5V.
3. Refer to Table 5 for valid Data-In during a write operation.
4. X can be VIL or VIH.
5. Code=00H/XX00H means unprotected.
Code=01H/XX01H means protected.
6. A18~A12=Sector address for sector protect.
7. The sector protect and chip unprotected functions may also be implemented via programming equipment.
P/N:PM1222
11
REV. 1.2, DEC. 09, 2005
Datasheet pdf - http://www.DataSheet4U.net/
11 Page | ||
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| PDF Descargar | [ Datasheet KH29LV800CB.PDF ] | |
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