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PDF PI29FCT520T Data sheet ( Hoja de datos )
| Número de pieza | PI29FCT520T | |
| Descripción | FAST CMOS MULTILEVEL PIPELINE REGISTERS | |
| Fabricantes | Pericom Semiconductor Corporation | |
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PI29FCT520T/2520T
PI29FCT521T1122334455667788990011223344556677889900112233445566778899001122112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788990011223344556677889900112233
Fast CMOS Multilevel Pipeline Registers
Product Features:
• PI29FCT520T and PI29FCT521T are pinout and
function compatible with IDT29FCT520/521,
QS29FCT520/521 and AMD's Am29520/521
• Four 8-bit high-speed registers
• Hold, Transfer, and load instructions
• Dual two-level or single four-level pipeline operation
• TTL input and output levels, reducing problematic
"ground bounce"
• High output drive
IOL = 48 mA
• Extremely low static power (1 mW, typ.)
• Industrial operating temperature range: –40°C to +85°C
• FCT (2xxxT) has a 25Ω series resistor.
• Packages available:
– 24-pin 300 mil wide plastic DIP (P24)
– 24-pin 150 mil wide plastic QSOP (Q24)
– 24-pin 150 mil wide plastic TQSOP (R24)
– 24-pin 300 mil wide plastic SOIC (S24)
Logic Block Diagram
Product Description:
Pericom Semiconductor’s PI29FCT series of logic circuits are
pro-duced in the Company’s advanced 0.8 micron CMOS
technology, achieving industry leading speed grades.
The PI29FCT520T/2520T and PI29FCT521T are multilevel
pipeline registers containing four 8-bit positive triggered registers
which can be configured as a dual 2-level or a single 4-level
pipeline. These products are designed for use as temporary storage
or for storage delays in pipelined systems.
The PI29FCT521T differs from the PI29FCT520T/2520T only in
the way data is loaded into and between registers in the dual 2-level
operation. When data is entered into the first level (I = 2 or I = 1)
of the PI29FCT520T/2520T, the existing data in the first level is
moved to the second level. In the PI29FCT521T, these instructions
simply overwrite the data in the first level. Transfer of data to the
second level is achieved using the 4-level shift instruction (I = 0)
causing the first level to change. In either part, I = 3 shift
instruction puts the registers on hold.
Device models available upon request.
D0–D7
8
www.DataSheet4U.com
I0,I1
2
CLK
1
REGISTER
CONTROL
S0,S1
2
FCT520.pm6
1
MUX
OCTAL
REGISTER A1
OCTAL
REGISTER B1
OCTAL
REGISTER A2
OCTAL
REGISTER B2
MUX
OE
1
8
Y0–Y7
12/18/96, 4:44 PM
PS2002B 12/10/96
1 page  
PI29FCT520/521T/2520T
112233445566778899001122334455667788990011223344556677889900112211223344556677889900112233445566778899001122334455667788990011221122334455667788M990011U2233L44T5566I77L8899E0011V2233E44L556677P88I99P0011E2211L22I3344N55E667788R9900E11G2233I44S5566T7788E99R0011S2233
PI29FCT520T/2520T Switching Characteristics over Operating Range
Parameters Description
FCT520AT/2520AT FCT520BT/2520BT
Com.
Com.
Conditions(1) Min Max Min Max
Unit
tPLH Propagation Delay
tPHL CLK to YX
tPLH Propagation Delay
tPHL S0 or S1 to YX
tSU Setup Time HIGH
or LOW DX to CLK
tH Hold Time HIGH
or LOW DX to CLK
tSU Setup Time HIGH
or LOW I0 or I1 to CLK
tH Hold Time HIGH
or LOW I0 or I1 to CLK
tPZH Output Enable Time
tPZL OE to YX
tPHZ Output Disable Time(3)
tPLZ OE to Yx
tW Clock Pulse Width(3)
HIGH or LOW
CL = 50 pF 2.0 14.0 2.0 7.5 ns
RL = 500Ω
2.0 13.0 2.0 7.5 ns
5.0 — 2.5 — ns
2.0 — 2.0 — ns
5.0 — 4.0 — ns
2.0 — 2.0 — ns
1.5 12.0 1.5 7.0 ns
1.5 15.0 1.5 7.5 ns
7.0 — 5.5 — ns
PI29FCT521T Switching Characteristics over Operating Range
Parameters Description
Conditions (1)
FCT521AT
Com.
Min Max
FCT521BT
Com.
Min Max
Unit
tPLH
tPHL
tPLH
www.DataSheet4tPUHL.com
tSU
tH
tSU
tH
tPZH
tPZL
tPHZ
tPLZ
tW
Propagation Delay
CLK to YX
Propagation Delay
S0 or S1 to YX
Setup Time HIGH
or LOW DX to CLK
Hold Time HIGH
or LOW DX to CLK
Setup Time HIGH
or LOW I0 orI1 to CLK
Hold Time HIGH
or LOW I0 orI1 to CLK
Output Enable Time
OE to Yx
Output Disable Time(3)
OE to Yx
Clock Pulse Width(3)
HIGH or LOW
CL = 50 pF 2.0 14.0 2.0 7.5 ns
RL = 500Ω
2.0 13.0 2.0 7.5
ns
5.0 — 2.5 — ns
2.0 — 2.0 — ns
5.0 — 4.0 — ns
2.0 — 2.0 — ns
1.5 12.0 1.5 7.0
ns
1.5 15.0 1.5 7.5 ns
7.0 — 5.5 — ns
Notes:
1. See test circuit and wave forms.
2. Minimum limits are guaranteed but not tested on Propagation Delays.
3. This parameter is guaranteed but not production tested.
Pericom Semiconductor Corporation
2380 Bering Drive • San Jose, CA 95131 • 1-800-435-2336 • Fax (408) 435-1100 • http://www.pericom.com
5 PS2002B 12/10/96
FCT520.pm6
5
12/18/96, 4:44 PM
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet PI29FCT520T.PDF ] | |
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