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STMicroelectronics |
74LCX16374
LOW VOLTAGE CMOS 16-BIT D-TYPE FLIP-FLOP (3-STATE)
WITH 5V TOLERANT INPUTS AND OUTPUTS
s 5V TOLERANT INPUTS AND OUTPUTS
s HIGH SPEED :
fMAX = 150MHz (MIN.) at VCC = 3V
www.DataSheet4U.csomPOWER DOWN PROTECTION ON INPUTS
AND OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 24mA (MIN) at VCC = 3V
s PCI BUS LEVELS GUARANTEED AT 24 mA
s BALANCED PROPAGATION DELAYS:
tPLH ≅ tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 2.0V to 3.6V (1.5V Data
Retention)
s PIN AND FUNCTION COMPATIBLE WITH
74 SERIES 16374
s LATCH-UP PERFORMANCE EXCEEDS
500mA (JESD 17)
s ESD PERFORMANCE:
HBM > 2000V (MIL STD 883 method 3015);
MM > 200V
DESCRIPTION
The 74LCX16374 is a low voltage CMOS 16 BIT
D-TYPE FLIP-FLOP with 3 STATE OUTPUTS
NON INVERTING fabricated with sub-micron
silicon gate and double-layer metal wiring C2MOS
technology. It is ideal for low power and high
speed 3.3V applications; it can be interfaced to 5V
signal environment for both inputs and outputs.
These 16 bit D-TYPE flip-flops are controlled by
two clock inputs (nCK) and two output enable in-
puts(nOE). On the positive transition of the (nCK),
the nQ outputs will be set to the logic state that
were setup at the nD inputs. While the (nOE) input
is low, the 8 outputs (nQ) will be in a normal state
(high or low logic level) and while high level the
outputs will be in a high impedance state.
Any output control does not affect the internal op-
eration of flip flops; that is, the old data can be re-
tained or the new data can be entered even while
the outputs are off.
It has same speed performance at 3.3V than 5V
AC/ACT family, combined with a lower power
consumption.
All inputs and outputs are equipped with protec-
tion circuits against static discharge, giving them
2KV ESD immunity and transient excess voltage.
February 2003
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
PIN CONNECTION
T&R
74LCX16374TTR
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74LCX16374
INPUT AND OUTPUT EQUIVALENT CIRCUIT
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PIN DESCRIPTION
PIN No
SYMBOL NAME AND FUNCTION
1 1OE 3 State Output Enable
Input (Active LOW)
2, 3, 5, 6, 8, 9, 1Q0 to 1Q7 3-State Outputs
11, 12
13, 14, 16, 17, 2Q0 to 2Q7 3-State Outputs
19, 20, 22, 23
24 2OE 3 State Output Enable
Input (Active LOW)
25 2CK Latch Enable Input
36, 35, 33, 32, 2D0 to 2D7 Data Inputs
30, 29, 27, 26
47, 46, 44, 43, 1D0 to 1D7 Data Inputs
41, 40, 38, 37
48 1CK Latch Enable Input
4, 10, 15, 21,
28, 34, 39, 45
GND
Ground (0V)
7, 18, 31, 42
VCC Positive Supply Voltage
TRUTH TABLE
INPUTS
OUTPUT
OE CK
HX
L
DQ
XZ
X NO CHANGE*
L LL
L HH
X : Don‘t Care
Z : High Impedance
IEC LOGIC SYMBOLS
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