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WS27C010L-17CMB 반도체 회로 부품 판매점

Military 128K x 8 CMOS EPROM



STMicroelectronics 로고
STMicroelectronics
WS27C010L-17CMB 데이터시트, 핀배열, 회로
WS27C010L
Military 128K x 8 CMOS EPROM
High Performance CMOS
— 90 ns Access Time
Fast Programming
EPI Processing
— Latch-Up Immunity to 200 mA
— ESD Protection Exceeds 2000 Volts
KEY FEATURES
DESC SMD No. 5962-89614
Compatible with JEDEC 27010 and
27C010 EPROMs
JEDEC Standard Pin Configuration
— 32 Pin CERDIP Package
— 32 Pin Leadless Chip Carrier (CLLCC)
GENERAL DESCRIPTION
The WS27C010L is a performance oriented 1 Meg UV Erasable Electrically Programmable Read Only Memory
organized as 128K words x 8 bits/word. It is manufactured using an advanced CMOS technology which enables it to
operate at data access times as fast as 120 nsecs. The memory was designed utilizing WSI's patented self-aligned
split gate EPROM cell, resulting in a low power device with a very cost effective die size.
The WS27C010L 1 Meg EPROM provides extensive code store capacity for microprocessor, DSP, and
microcontroller-based systems. Its 120 nsec access time over the full Military temperature range provides the
potential of no-wait state operation. And where this parameter is important, the WS27C010L provides the user with
a very fast 35 nsec TOE output enable time.
The WS27C010L is offered in both a 32 pin 600 mil CERDIP, and a 32 pad Ceramic Leadless Chip Carrier
(CLLCC) for surface mount applications. Its standard JEDEC EPROM pinouts provide for automatic upgrade
density paths for existing 128K and 256K EPROM users.
PIN CONFIGURATION
Chip Carrier
TOP VIEW
CERDIP
A7
4
5
3
2
1
32 31 30
29
A14
A6 6
28 A13
A5 7
27 A8
A4 8
26 A9
A3 9
25 A11
A2 10
24 OE
A1 11
23 A10
A0 12
22 CE
O0 13
21 O7
14 15 16 17 18 19 20
O1 O2 O3 O4 O5 O6
VPP
A16
A15
A12
A7
A6
A5
A4
A3
A2
A1
A0
O0
O1
O2
GND
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32 VCC
31 PGM
30 NC
29 A14
28 A13
27 A8
26 A9
25 A11
24 OE
23 A10
22 CE
21 O7
20 O6
19 O5
18 O4
17 O3
PRODUCT SELECTION GUIDE
PARAMETER
Address Access Time (Max)
Chip Select Time (Max)
Output Enable Time (Max)
27C010L-90
90 ns
90 ns
35 ns
27C010L-12
120 ns
120 ns
35 ns
27C010L-15
150 ns
150 ns
40 ns
27C010L-17
170 ns
170 ns
40 ns
27C010L-20
200 ns
200 ns
40 ns
Return to Main Menu
4-25


WS27C010L-17CMB 데이터시트, 핀배열, 회로
WS27C010L
ABSOLUTE MAXIMUM RATINGS*
Storage Temperature............................–65° to + 150°C
Voltage on any Pin with
Respect to Ground ....................................–0.6V to +7V
VPP with Respect to Ground...................–0.6V to + 14V
VCC Supply Voltage with
Respect to Ground ....................................–0.6V to +7V
ESD Protection ..................................................>2000V
OPERATING RANGE
RANGE
TEMPERATURE
Military
–55°C to +125°C
VCC
+5V ± 10%
*NOTICE:
Stresses above those listed under "Absolute Maximum
Ratings" may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at these or any other conditions above
those indicated in the operational sections of this
specification is not implied. Exposure to absolute
maximum rating conditions for extended periods of
time may affect device reliability.
DC READ CHARACTERISTICS Over Operating Range. (See Above)
SYMBOL
PARAMETER
TEST CONDITIONS
MIN MAX
VIL Input Low Voltage
–0.5 0.8
VIH Input High Voltage
2.0 VCC + 1
VOL Output Low Voltage
IOL = 2.1 mA
0.4
VOH Output High Voltage
IOH = –400 µA
3.5
ISB1 VCC Standby Current (CMOS) CE = VCC ± 0.3 V (Note 2)
100
ISB2 VCC Standby Current
CE = VIH
1
ICC
VCC Active Current (TTL)
CE = OE = VIL
(Note 1)
F = 5 MHz
F = 8 MHz
50
60
IPP VPP Supply Current
VPP VPP Read Voltage
ILI Input Leakage Current
VPP = VCC
VIN = 5.5 V or Gnd
VCC –0.4
–10
100
VCC
10
ILO
Output Leakage Current
VOUT = 5.5 V or Gnd
–10 10
NOTES: 1. The supply current is the sum of ICC and IPP. The maximum current value is with Outputs O0 to O7 unloaded.
2. CMOS inputs: VIL = GND ± 0.3V, VIH = VCC ± 0.3 V.
UNITS
V
V
V
V
µA
mA
mA
mA
µA
V
µA
µA
AC READ CHARACTERISTICS Over Operating Range with VPP = VCC.
SYMBOL
PARAMETER
-90 -12 -15 -17
MIN MAX MIN MAX MIN MAX MIN MAX
tACC
tCE
tOE
tDF
Address to Output Delay
CE to Output Delay
OE to Output Delay
Output Disable to
Output Float (Note 3)
90
90
35
35
120 150 170
120 150 170
35 40 40
35 40 40
Output Hold from
tOH
Addresses, CE or OE,
Whichever Occurred
0
0
0
0
First (Note 3)
-20
MIN MAX
200
200
40
40
0
UNITS
ns
NOTE: 3. This parameter is only sampled and is not 100% tested. Output Float is defined as the point where data is no longer driven – see timing
diagram.
4-26




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WS27C010L-17CMB

Military 128K x 8 CMOS EPROM - STMicroelectronics