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Número de pieza | K6L0908C2A-F | |
Descripción | 64Kx8 bit Low Power CMOS Static RAM | |
Fabricantes | Samsung semiconductor | |
Logotipo | ||
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Document Title
64Kx8 bit Low Power CMOS Static RAM
CMOS SRAM
Revision History
Revision No.
0.0
History
Initial draft
0.1 Revision
1.0 Finalize
2.0 Revision
- Add 45ns part with 30pf test load.
3.0 Revision
- Change Data Sheet format :
One data sheets for industrial and commercial product
4.0 Revision
- Change Data Sheet format
- Remove 45ns part from commercial product and 100ns part
from industrial product
- Remove low power part form TSOP package
Draft Data
Novemer 28, 1993
May 13, 1994
December 1, 1994
August 12, 1995
April 15, 1996
January 9, 1998
Remark
Design target
Preliminary
Final
Final
Final
Final
The attached data, sheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
1 Revision 4.0
January 1997
1 page K6L0908C2A Family
CMOS SRAM
AC OPERATING CONDITIONS
TEST CONDITIONS( Test Load and Input/Output Reference)
Input pulse level : 0.8 to 2.4V
Input rising and falling time : 5ns
Input and output reference voltage :1.5V
Output load(see right) : CL=100pF+1TTL
CL1)
1. Including scope and jig capacitance
AC CHARACTERISTICS (Vcc=4.5~5.5V, K6L0908C2A-C Family:TA=0 to 70°C, K6L0908C2A-I Family:TA=-40 to 85°C)
Parameter List
Read
Write
Read cycle time
Address access time
Chip select to output
Output enable to valid output
Chip select to low-Z output
Output enable to low-Z output
Chip disable to high-Z output
Output disable to high-Z output
Output hold from address change
Write cycle time
Chip select to end of write
Address set-up time
Address valid to end of write
Write pulse width
Write recovery time
Write to output high-Z
Data to write time overlap
Data hold from write time
End write to output low-Z
Symbol
tRC
tAA
tCO1, tCO2
tOE
tLZ
tOLZ
tHZ
tOHZ
tOH
tWC
tCW
tAS
tAW
tWP
tWR
tWHZ
tDW
tDH
tOW
Speed Bins
55ns
70ns
Min Max Min Max
55 - 70 -
- 55 - 70
- 55 - 70
- 25 - 35
10 - 10 -
5-5-
0 20 0 25
0 20 0 25
10 - 10 -
55 - 70 -
45 - 60 -
0-0-
45 - 60 -
40 - 50 -
0-0-
0 20 0 25
25 - 30 -
0-0-
5-5-
Units
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
DATA RETENTION CHARACTERISTICS
Item
Vcc for data retention
VDR
Data retention current
IDR
Data retention set-up time tSDR
Recovery time
tRDR
Symbol
K6L0908C2A-L/-B
K6L0908C2A-P/-F
Test Condition
CS11)≥Vcc-0.2V
Vcc=3.0V CS1≥Vcc-0.2V
CS2≥Vcc-0.2V or CS2≤0.2V
L-Ver
LL-Ver
L-Ver
LL-Ver
See data retention waveform
1. CS1≥Vcc-0.2V, CS2≥Vcc-0.2V( CS1 controlled) or CS2≤0.2V(CS2 controlled).
Min Typ Max Unit
2.0 - 5.5 V
- 1 50
- 0.5 10 µA
- - 50
- - 25
0- -
ms
5- -
5 Revision 4.0
January 1997
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet K6L0908C2A-F.PDF ] |
Número de pieza | Descripción | Fabricantes |
K6L0908C2A-B | 64Kx8 bit Low Power CMOS Static RAM | Samsung semiconductor |
K6L0908C2A-F | 64Kx8 bit Low Power CMOS Static RAM | Samsung semiconductor |
K6L0908C2A-L | 64Kx8 bit Low Power CMOS Static RAM | Samsung semiconductor |
K6L0908C2A-P | 64Kx8 bit Low Power CMOS Static RAM | Samsung semiconductor |
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