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Samsung semiconductor |
K6F2016U4E Family
CMOS SRAM
Document Title
128K x16 bit Super Low Power and Low Voltage Full CMOS Static RAM
Revision History
Revision No. History
0.0 Initial Draft
1.0 Finalize
- Change ICC2 from 21 to 26mA for 55ns product.
- Change ICC2 from 17 to 20mA for 70ns product.
- Remove "A1 Index Mark" of 48-TBGA package bottom side
2.0 Revise
- Changed 48-TBGA vertical dimension
E1(Typical) 0.55mm to 0.58mm
E2(Typical) 0.35mm to 0.32mm
Draft Date
February 21, 2001
Remark
Preliminary
April 30, 2001
Final
September 27, 2001 Final
The attached datasheets are provided by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the specifications and
products. SAMSUNG Electronics will answer to your questions about device. If you have any questions, please contact the SAMSUNG branch offices.
- 1 - Revision 2.0
September 2001
K6F2016U4E Family
CMOS SRAM
128K x 16 bit Super Low Power and Low Voltage Full CMOS Static RAM
FEATURES
• Process Technology: Full CMOS
• Organization: 128K x16 bit
• Power Supply Voltage: 2.7~3.3V
• Low Data Retention Voltage: 1.5V(Min)
• Three State Outputs
• Package Type: 48-TBGA-6.00x7.00
GENERAL DESCRIPTION
The K6F2016U4E families are fabricated by SAMSUNG′s
advanced full CMOS process technology. The families support
industrial temperature range and 48 ball Chip Scale Package
for user flexibility of system design. The families also support
low data retention voltage for battery back-up operation with
low data retention current.
PRODUCT FAMILY
Product Family Operating Temperature Vcc Range Speed
K6F2016U4E-F
Industrial(-40~85°C)
2.7~3.3V
551)/70ns
1. The parameter is measured with 30pF test load.
2. Typical values are measured at VCC=3.0V, TA=25°C and not 100% tested.
Power Dissipation
Standby
(ISB1, Typ.)
Operating
(ICC1, Max)
PKG Type
0.5µA2)
2mA
48-TBGA-6.00x7.00
PIN DESCRIPTION
1 23 4 5 6
A LB OE A0 A1 A2 DNU
B
I/O9 UB
A3
A4 CS1 I/O1
C
I/O10 I/O11
A5
A6 I/O2 I/O3
FUNCTIONAL BLOCK DIAGRAM
Clk gen.
Row
Addresses
Row
select
Precharge circuit.
Memory array
1024 rows
128 × 16 columns
Vcc
Vss
D Vss I/O12 DNU A7 I/O4 Vcc
E Vcc I/O13 DNU A16 I/O5 Vss
F
I/O15 I/O14 A14
A15 I/O6 I/O7
G I/O16 DNU A12 A13 WE I/O8
H
DNU
A8
A9
A10 A11 DNU
I/O1~I/O8
I/O9~I/O16
Data
cont
Data
cont
Data
cont
I/O Circuit
Column select
Column Addresses
48-TBGA: Top View (Ball Down)
Name
Function
CS1, CS2 Chip Select Inputs
OE Output Enable Input
WE Write Enable Input
A0~A16 Address Inputs
I/O1~I/O16 Data Inputs/Outputs
Name
Vcc
Vss
UB
LB
DNU
Function
Power
Ground
Upper Byte(I/O9~16)
Lower Byte(I/O1~8)
Do Not Use
CS
OE
WE Control Logic
UB
LB
SAMSUNG ELECTRONICS CO., LTD. reserves the right to change products and specifications without notice.
- 2 - Revision 2.0
September 2001
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