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K6E0808C1E-I 반도체 회로 부품 판매점

32K x 8 Bit High-Speed CMOS Static RAM



Samsung semiconductor 로고
Samsung semiconductor
K6E0808C1E-I 데이터시트, 핀배열, 회로
K6E0808C1E-C/E-L, K6E0808C1E-I/E-P
For Cisco
CMOS SRAM
Document Title
32Kx8 Bit High-Speed CMOS Static RAM(5V Operating).
Operated at Commercial and Industrial Temperature Ranges.
Revision History
Rev.No. History
Rev. 0.0 Initial release with Preliminary.
Rev. 1.0 Release to Final Data Sheet.
Rev. 2.0 2.1. Add Low Power Version.
2.2. Add data retention charactoristic.
Draft Data
Aug. 1. 1998
Nov. 2. 1998
Feb. 25. 1999
Remark
Preliminary
Final
Final
The attached data sheets are prepared and approved by SAMSUNG Electronics. SAMSUNG Electronics CO., LTD. reserve the right to change the
specifications. SAMSUNG Electronics will evaluate and reply to your requests and questions on the parameters of this device. If you have any ques-
tions, please contact the SAMSUNG branch office near your office, call or contact Headquarters.
-1-
Revision 2.0
Feburary 1999


K6E0808C1E-I 데이터시트, 핀배열, 회로
K6E0808C1E-C/E-L, K6E0808C1E-I/E-P
For Cisco
CMOS SRAM
32K x 8 Bit High-Speed CMOS Static RAM
FEATURES
• Fast Access Time 10, 12, 15ns(Max.)
• Low Power Dissipation
Standby (TTL) : 20mA(Max.)
(CMOS) : 2mA(Max.)
0.6mA(Max.) L-ver. Only
Operating K6E0808C1E-10 : 80mA(Max.)
K6E0808C1E-12 : 80mA(Max.)
K6E0808C1E-15 : 80mA(Max.)
• Single 5.0V±10% Power Supply
• TTL Compatible Inputs and Outputs
• I/O Compatible with 3.3V Device
• Fully Static Operation
- No Clock or Refresh required
• Three State Outputs
• 2V Minimum Data Retention : L-Ver. only
• Standard Pin Configuration
K6E0808C1E-J : 28-SOJ-300
K6E0808C1E-T : 28-TSOP1-0813. 4F
ORDERING INFORMATION
K6E0808C1E-C10/C12/C15
Commercial Temp.
K6E0808C1E-I10/I12/I15
Industrial Temp.
FUNCTIONAL BLOCK DIAGRAM
Clk Gen.
A0
A1
A2
A3
A4
A5
A6
A7
A8
I/O1~I/O8
Data
Cont.
Pre-Charge-Circuit
Memory Array
512 Rows
64x8 Columns
I/O Circuit
Column Select
CLK
Gen.
A9 A10 A11 A12 A13 A14
CS
WE
OE
GENERAL DESCRIPTION
The K6E0808C1E is a 262,144-bit high-speed Static Random
Access Memory organized as 32,768 words by 8 bits. The
K6E0808C1E uses 8 common input and output lines and has
an output enable pin which operates faster than address access
time at read cycle. The device is fabricated using SAMSUNGs
advanced CMOS process and designed for high-speed circuit
technology. It is particularly well suited for use in high-density
high-speed system applications. The K6E0808C1E is packaged
in a 300mil 28-pin plastic SOJ or TSOP1 forward.
PIN CONFIGURATION(Top View)
OE 1
A11 2
A9 3
A8 4
A13 5
WE 6
Vcc 7
A14 8
A12 9
A7 10
A6 11
A5 12
A4 13
A3 14
TSOP1
28 A10
27 CS
26 I/O8
25 I/O7
24 I/O6
23 I/O5
22 I/O4
21 Vss
20 I/O3
19 I/O2
18 I/O1
17 A0
16 A1
15 A2
A14 1
A12 2
A7 3
A6 4
A5 5
A4 6
A3 7
A2 8
A1 9
A0 10
I/O1 11
I/O2 12
I/O3 13
Vss 14
SOJ
28 Vcc
27 WE
26 A13
25 A8
24 A9
23 A11
22 OE
21 A10
20 CS
19 I/O8
18 I/O7
17 I/O6
16 I/O5
15 I/O4
PIN FUNCTION
Pin Name
A0 - A14
WE
CS
OE
I/O1 ~ I/O8
VCC
VSS
Pin Function
Address Inputs
Write Enable
Chip Select
Output Enable
Data Inputs/Outputs
Power(+5.0V)
Ground
-2-
Revision 2.0
Feburary 1999




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