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PDF HM1-6561B883 Data sheet ( Hoja de datos )
| Número de pieza | HM1-6561B883 | |
| Descripción | 256 x 4 CMOS RAM | |
| Fabricantes | Intersil Corporation | |
| Logotipo |  |
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HM-6561/883
March 1997
256 x 4 CMOS RAM
Features
Description
• This Circuit is Processed in Accordance to MIL-STD-
883 and is Fully Conformant Under the Provisions of
Paragraph 1.2.1.
• Low Power Standby . . . . . . . . . . . . . . . . . . . . 50µW Max
• Low Power Operation . . . . . . . . . . . . . 20mW/MHz Max
• Fast Access Time. . . . . . . . . . . . . . . . . . . . . . 200ns Max
• Data Retention . . . . . . . . . . . . . . . . . . . . . . . .at 2.0V Min
• TTL Compatible Input/Output
• High Output Drive - 1 TTL Load
• On-Chip Address Registers
• Common Data In/Out
The HM-6561/883 is a 256 x 4 static CMOS RAM fabricated
using self-aligned silicon gate technology. Synchronous
circuit design techniques are employed to achieve high per-
formance and low power operation.
On-chip latches are provided for address and data outputs
allowing efficient interfacing with microprocessor systems.
The data output buffers can be forced to a high impedance
state for use in expanded memory arrays. The data inputs
and outputs are multiplexed internally for common I/O bus
compatibility.
The HM-6561/883 is a fully static RAM and may be
maintained in any state for an indefinite period of time. Data
retention supply voltage and supply current are guaranteed
over temperature.
• Three-State Output
• Easy Microprocessor Interfacing
Ordering Information
PACKAGE TEMPERATURE RANGE
220ns
CERDIP
-55oC to +125oC
HM1-6561B/883
300ns
HM1-6561/883
PKG. NO.
F18.3
Pinout
HM-6561/883 (CERDIP)
TOP VIEW
A3 1
A2 2
A1 3
A0 4
A5 5
A6 6
A7 7
GND 8
E9
18 VCC
17 A4
16 W
15 S1
14 DQ3
13 DQ2
12 DQ1
11 DQ0
10 S2
PIN DESCRIPTION
A Address Input
E Chip Enable
W Write Enable
S Chip Select
DQ Data In/Out
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures.
http://www.intersil.com or 407-727-9207 | Copyright © Intersil Corporation 1999
6-117
File Number 2990.1
1 page  
HM-6561/883
TABLE 3. HM-6561/883 ELECTRICAL PERFORMANCE SPECIFICATIONS
LIMITS
SYMBOL
PARAMETER
CONDITIONS
CI Input Capacitance VCC = Open, f = 1MHz,
All Measurements
Referenced to Device
Ground
CO Output Capacitance VCC = Open, f = 1MHz,
All Measurements
Referenced to Device
Ground
NOTE TEMPERATURE
MIN
MAX
UNITS
1 TA = +25oC
- 8 pF
1 TA = +25oC
- 10 pF
NOTE:
1. The parameters listed in Table 3 are controlled via design or process parameters are characterized upon initial design and after major
process and/or design changes.
TABLE 4. APPLICABLE SUBGROUPS
CONFORMANCE GROUPS
METHOD
SUBGROUPS
Initial Test
100%/5004
-
Interim Test
100%/5004
1, 7, 9
PDA
100%/5004
1
Final Test
100%/5004
2, 3, 8A, 8B, 10, 11
Group A
Samples/5005
1, 2, 3, 7, 8A, 8B, 9, 10, 11
Groups C & D
Samples/5005
1, 7, 9
Test Load Circuit
DUT
(NOTE 1) CL
IOH
+
-
1.5V
EQUIVALENT CIRCUIT
NOTE:
1. Test head capacitance includes stray and jig capacitance.
IOL
6-121
5 Page | ||
| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet HM1-6561B883.PDF ] | |
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