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ADV7150 반도체 회로 부품 판매점

CMOS 220 MHz True-Color Graphics Triple 10-Bit Video RAM-DAC



Analog Devices 로고
Analog Devices
ADV7150 데이터시트, 핀배열, 회로
a
CMOS 220 MHz True-Color Graphics
Triple 10-Bit Video RAM-DAC
ADV7150
FEATURES
220 MHz, 24-Bit (30-Bit Gamma Corrected) True Color
Triple 10-Bit “Gamma Correcting” D/A Converters
Triple 256 ؋ 10 (256 ؋ 30) Color Palette RAM
On-Chip Clock Control Circuit
Palette Priority Select Registers
RS-343A/RS-170 Compatible Analog Outputs
TTL Compatible Digital Inputs
Standard MPU l/O Interface
10-Bit Parallel Structure
8+2 Byte Structure
Programmable Pixel Port: 24-Bit, 15-Bit and
Programmable Pixel Port: 8-Bit (Pseudo)
Pixel Data Serializer
Multiplexed Pixel Input Ports; 1:1, 2:1, 4:1
+5 V CMOS Monolithic Construction
160-Lead Plastic Quad Flatpack (QFP)
Thermally Enhanced to Achieve JC < 1.0؇C/W
MODES OF OPERATION
24-Bit True Color (30-Bit Gamma Corrected)
@ 220 MHz
@ 170 MHz
@ 135 MHz
@ 110 MHz
@ 85 MHz
8-Bit Pseudo Color
15-Bit True Color
APPLICATIONS
High Resolution, True Color Graphics
Professional Color Prepress Imaging
GENERAL DESCRIPTION
The ADV7150 (ADV®) is a complete analog output, Video
RAM-DAC on a single CMOS monolithic chip. The part is spe-
cifically designed for use in high performance, color graphics
workstations. The ADV7150 integrates a number of graphic
functions onto one device allowing 24-bit direct True-Color op-
eration at the maximum screen update rate of 220 MHz. The
ADV7150 implements 30-bit True Color in 24-bit frame buffer
designs. The part also supports other modes, including 15-bit
True Color and 8-bit Pseudo or Indexed Color. Either the Red,
Green or Blue input pixel ports can be used for Pseudo Color.
(Continued on page 12)
ADV is a registered trademark of Analog Devices, Inc.
FUNCTIONAL BLOCK DIAGRAM
VAA
24
A
ADV7150
RED (R7–R0),
24
B
GREEN (G7–G0),
BLUE (B7–B0)
COLOR DATA
24
C
D
PALETTE
SELECTS
(PS0, PS1)
24
8
P
I
X
96
E MUX
L 4:1
P
O
R
T8
MUX
4:1
8
8
8
2
LOADIN
LOADOUT
PRGCKOUT
SCKIN
SCKOUT
SYNC
BLANK
CLOCK CONTROL
CLOCK DIVIDE
&
SYNCHRONIZATION
CIRCUIT
÷32 ÷16, ÷8, ÷4, ÷2
ADDRESS
REGISTER
ADDR
(A7–A0)
MODE
REGISTER
(MR1)
CLOCK
CLOCK
ECL TO CMOS
CE R/W C0 C1
256-COLOR/GAMMA
PALETTE RAM
RED
256 x 10
10
GREEN
256 x 10
10
BLUE
256 x 10
10
10-BIT
RED DAC
10-BIT
GREEN DAC
10-BIT
BLUE DAC
CONTROL REGISTERS
PIXEL MASK
REGISTER
TEST
REGISTERS
ID
REGISTER
COMMAND
REGISTERS
(CR1–CR3)
REVISION
REGISTER
SYNC
OUTPUT
DATA TO
PALETTES
30
VOLTAGE
REFERENCE
CIRCUIT
COLOR REGISTERS
RED
BLUE
GREEN
REGISTER REGISTER REGISTER
MPU PORT
10 (8+2)
D9 – D0
GND
IOR
IOR
IOG
IOG
IOB
IOB
IPLL
SYNCOUT
VREF
RSET
COMP
REV. A
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
© Analog Devices, Inc., 1996
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703


ADV7150 데이터시트, 핀배열, 회로
ADV7150–SPECIFICATIONS (VAA1 = +5 V; VREF = +1.235 V; RSET = 280 . IOR, IOG, IOB (RL = 37.5 ,
CL = 10 pF); IOR, IOG, IOB = GND. All specifications TMIN to TMAX2 unless otherwise noted.)
Parameter
All Versions
Unit
Test Conditions/Comments
STATIC PERFORMANCE
Resolution (Each DAC)
Accuracy (Each DAC)
Integral Nonlinearity
Differential Nonlinearity
Gray Scale Error
Coding
10 Bits
± 1 LSB max
±1
LSB max
Guaranteed Monotonic
± 5 % Gray Scale max
Binary
DIGITAL INPUTS (Excluding CLOCK, CLOCK)
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
CLOCK INPUTS (CLOCK, CLOCK)
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
DIGITAL OUTPUT
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance
2
0.8
± 10
10
VAA – 1.0
VAA – 1.6
± 10
10
2.4
0.4
20
20
V min
V max
µA max
pF max
V min
V max
µA max
pF typ
V min
V max
µA max
pF typ
VIN = 0.4 V or 2.4 V
VIN = 0.4 V or 2.4 V
ISOURCE = 400 µA
ISINK = 3.2 mA
ANALOG OUTPUTS
Gray Scale Current Range
Output Current
White Level Relative to Blank
White Level Relative to Black
Black Level Relative to Blank
Blank Level on IOR, IOB
Blank Level on IOG
Sync Level on IOG
LSB Size
DAC-to-DAC Matching
Output Compliance, VOC
Output Impedance, ROUT
Output Capacitance, COUT
VOLTAGE REFERENCE
Voltage Reference Range, VREF
Input Current, IVREF
POWER REQUIREMENTS
VAA
IAA3
IAA3
IAA
IAA
IAA
Power Supply Rejection Ratio
15/22
17.69/20.40
16.74/18.50
0.95/1.90
0/50
6.29/8.96
0/50
17.22
3
0/+1.4
100
30
1.14/1.26
+5
5
400
370
350
330
315
0.5
mA min/max
mA min/max
mA min/max
mA min/max
µA min/max
mA min/max
µA min/max
µA typ
% max
V min/V max
ktyp
pF max
V min/V max
µA typ
V nom
mA max
mA max
mA max
mA max
mA max
%/% max
Typically 19.05 mA
Typically 17.62 mA
Typically 1.44 mA
Typically 5 µA
Typically 7.62 mA
Typically 5 µA
Typically 1%
IOUT = 0 mA
VREF = 1.235 V for Specified Performance
220 MHz Parts
170 MHz Parts
135 MHz Parts
110 MHz Parts
85 MHz Parts
Typically 0.12%/%: COMP = 0.1 µF
DYNAMIC PERFORMANCE
Clock and Data Feedthrough4, 5
Glitch Impulse
DAC-to-DAC Crosstalk6
–30 dB typ
50 pV secs typ
–23 dB typ
NOTES
1± 5% for all versions.
2Temperature range (TMIN to TMAX): 0°C to +70°C; TJ (Silicon Junction Temperature) 100°C.
3Pixel Port is continuously clocked with data corresponding to a linear ramp. T J = 100°C.
4Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. Glitch impulse includes clock and data feedthrough.
5TTL input values are 0 to 3 volts, with input rise/fall times 3 ns, measured the 10% and 90% points. Timing reference points at 50% for inputs and outputs.
6DAC-to-DAC crosstalk is measured by holding one DAC high while the other two are making low-to-high and high-to-low transitions.
Specifications subject to change without notice.
–2– REV. A




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