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ADV471 반도체 회로 부품 판매점

CMOS 80 MHz Monolithic 256 x 24(18) Color Palette RAM-DACs



Analog Devices 로고
Analog Devices
ADV471 데이터시트, 핀배열, 회로
a
CMOS 80 MHz Monolithic 256 ؋ 24(18)
Color Palette RAM-DACs
ADV478/ADV471
FEATURES
Personal System/2* Compatible
FUNCTIONAL BLOCK DIAGRAM
80 MHz Pipelined Operation
Triple 8-Bit (6-Bit) D/A Converters
256 ؋ 24(18) Color Palette RAM
15 ؋ 24(18) Overlay Registers
RS-343A/RS-170 Compatible Outputs
Sync on All Three Channels
Programmable Pedestal (0 or 7.5 IRE)
External Voltage or Current Reference
Standard MPU Interface
+5 V CMOS Monolithic Construction
44-Pin PLCC Package
Power Dissipation: 800 mW
OAPPLICATIONS
BHigh Resolution Color Graphics
SCAE/CAD/CAM Applications
Image Processing
OInstrumentation
Desktop Publishing
LAVAILABLE CLOCK RATES
E80 MHz
T66 MHz
E50 MHz
35 MHz
GENERAL DESCRIPTION
The ADV478 (ADV®) and ADV471 are pin compatible and
software compatible RAM-DACs designed specifically for
Personal System/2 compatible color graphics.
The ADV478 has a 256 × 24 color lookup table with triple 8-bit
video D/A converters. It may be configured for either 6 bits or
8 bits per color operation. The ADV471 has a 256 × 18 color
lookup table with triple 6-bit video D/A converters.
Options on both parts include a programmable pedestal (0 or
7.5 IRE) and use of an external voltage or current reference.
ADV is a registered trademark of Analog Devices, Inc.
*Personal System/2 is a trademark of International Business Machines Corp.
Fifteen overlay registers provide for overlaying cursors, grids,
menus, EGA emulation, etc. Also supported is a pixel read
mask register and sync generation on all three channels.
The ADV478 and ADV471 generate RS-343A compatible
video signals into a doubly terminated 75 load, and RS-170
compatible video signals into a singly terminated 75 load,
without requiring external buffering. Differential and integral
linearity errors are guaranteed to be a maximum of ± 1 LSB for
the ADV478 and ± 1/4 LSB for the ADV471 over the full tem-
perature range.
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 617/329-4700
Fax: 617/326-8703


ADV471 데이터시트, 핀배열, 회로
ADV478/ADV471–SPECIFICATIONS (VAA1 = +5 V, SETUP = 8/6 = VAA, VREF = +1.235 V. RSET = 147 .
All specifications TMIN to TMAX2 unless otherwise noted.)
Parameter
All Versions
Units
Test Conditions/Comments
STATIC PERFORMANCE
Resolution (Each DAC)3
Accuracy (Each DAC)3
Integral Nonlinearity
Differential Nonlinearity
Gray Scale Error
Coding
8 (6)
± 1 (1/4)
± 1 (1/4)
±5
Binary
Bits
LSB max
LSB max
% Gray Scale max
Guaranteed Monotonic
DIGITAL INPUTS
Input High Voltage, VINH
Input Low Voltage, VINL
Input Current, IIN
Input Capacitance, CIN
2 V min
0.8 V max
±1
µA max
VIN = 0.4 V or 2 .4 V
7 pF max
DIGITAL OUTPUTS
Output High Voltage, VOH
Output Low Voltage, VOL
Floating-State Leakage Current
Floating-State Output Capacitance
ANALOG OUTPUTS
OGray Scale Current Range
Output Current
BWhite Level Relative to Blank
SWhite Level Relative to Black
OBlack Level Relative to Blank
L(SETUP = VAA)
Black Level Relative to Blank
E(SETUP = GND)
TEBlank Level
2.4
0.4
50
7
20
17.69
20.40
16.74
18.50
0.95
1.90
0
50
6.29
8.96
V min
V max
µA max
pF max
mA max
mA min
mA max
mA min
mA max
mA min
mA max
µA min
µA max
mA min
mA max
ISOURCE = 400 µA
ISINK = 3.2 mA
Typically 19.05 mA
Typically 17.62 mA
Typically 1.44 mA
Typically 5 µA
Typically 7.62 mA
Sync Level
0
µA min
Typically 5 µA
50 µA max
LSB Size3
69.1 (279.68) µA typ
8/6 = Logical 1 for ADV478
DAC to DAC Matching
5
% max
Typically 2%
Output Compliance, VOC
–1 V min
+1.5 V max
Output Impedance, ROUT
10 ktyp
Output Capacitance, COUT
30
pF max
IOUT = 0 mA
VOLTAGE REFERENCE
Voltage Reference Range, VREF
Input Current, IVREF
1.14/1.26
10
V min/V max
µA typ
Tested in Voltage Reference
Configuration with VREF = 1.235 V
POWER SUPPLY
Supply Voltage, VAA
Supply Current, IAA
Power Supply Rejection Ratio
Power Dissipation
4.75/5.25
4.50/5.50
220
0.5
1100
V min/V max
V min/V max
mA max
%/% max
mW max
80 MHz and 66 MHz Parts
50 MHz and 35 MHz Parts
Typically 180 mA
f = 1 kHz, COMP = 0.1 µF
Typically 900 mW, VAA = 5 V
DYNAMIC PERFORMANCE
Clock and Data Feedthrough4, 5
Glitch Impulse4, 5
DAC to DAC Crosstalk6
–30
75
–23
dB typ
pV secs typ
dB typ
NOTES
1± 5% for 80 MHz and 66 MHz parts; ± 10% for 50 MHz and 35 MHz parts.
2Temperature Range (TMIN to TMAX); 0°C to +70°C.
3Numbers in parentheses indicate ADV471 parameter value.
4Clock and data feedthrough is a function of the amount of overshoot and undershoot on the digital inputs. For this test, the digital inputs have a 1 k resistor to
ground and are driven by 74HC logic. Glitch impulse includes clock and data feedthrough, –3 dB test bandwidth = 2 × clock rate.
5TTL input values are 0 to 3 volts, with input rise/fall times 3 ns, measured between the 10% and 90% points. Timing reference points at 50% for inputs and out-
puts. Analog output load 10 pF, D0–D7 output load 50 pF. See timing notes in Figure 2.
6DAC to DAC crosstalk is measured by holding one DAC high while the other two are making low to high and high to low transitions.
Specifications subject to change without notice.
–2– REV. B




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