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PDF TS68C000 Data sheet ( Hoja de datos )
| Número de pieza | TS68C000 | |
| Descripción | Low Power HCMOS 16-/32-bit Hi-Rel Microprocessor | |
| Fabricantes | ATMEL Corporation | |
| Logotipo |  |
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Features
• 16-/32-bit Data and Address Register
• 16-Mbyte Direct Addressing Range
• 56 Powerful Instruction Types
• Operations on Five Main Data Types
• Memory Mapped Input/Output
• 14 Addressing Modes
• Three Available Versions: 8 MHz/10 MHz and 12.5 MHz
• Military Temperature Range: -55/+125°C
• Power Supply: 5VDC ± 10%
Description
The TS68C000 reduced power consumption device dissipates an order of magnitude
less power than the HMOS TS68000. The TS68C000 is an implementation of the
TS68000 16/32 microprocessor architecture. The TS68C000 has a 16-bit data bus
and 24-bit address bus while the full architecture provides for 32-bit address and data-
buses. It is completely code-compatible with the HMOS TS68000, TS68008 8-bit data
bus implementation of the TS68000 and the TS68020 32-bit implementation of the
architecture. Any user-mode programs written using the TS68C000 instruction set will
run unchanged on the TS68000, TS68008 and TS68020. This is possible because the
user programming model is identical for all processors and the instruction sets are
proper sub-sets of the complete architecture.
Screening/Quality
This product is manufactured in full compliance with:
• MIL-STD-883 class B
• DESC drawing 5962-89462
• Atmel standards
Low Power
HCMOS
16-/32-bit
Hi-Rel
Microprocessor
TS68C000
C Suffix
DIL 64
Ceramic Package
F Suffix
CQFP 68
Ceramic Quad Flat Pack (on request)
E Suffix
LCCC 68
Leadless Ceramic Chip Carrier
R Suffix
PGA 68
Pin Grid Array
Rev. 2170A–HIREL–09/05
1 page  
Figure 1-5. 68-ceramic Quad Flat Pack
Index
68
1
DTACK
BG
BGACK
BR
VCC
CLK
GND
GND
NC
HALT
RESET
VMA
E
VPA
BERR
IPL2
IPL1
17
18
TS68C000
TOP VIEW
52
51 D13
D14
D15
GND
GND
A23
A22
A21
VCC
A20
A19
A18
A17
A16
A15
A14
A13
35
34
1.4 Terminal Designations
The function, category and relevant symbol of each terminal of the device are given in the follow-
ing table.
Table 1-1.
Symbol
Terminal Designations
Function
Category
VCC
VSS(1)
FC0 to FC2
IPL0 to IPL2
A1 to A23
AS
R/W
UDS
LDS
DTACK
BR
BGACK
BG
Power supply (2 terminals)
Power supply (2 terminals)
Processor status
Interrupt control
Address bus
Supply
Terminals
Outputs
Inputs
Outputs
Asynchronous bus control
Bus arbitration control
Outputs
Input
Inputs
Output
2170A–HIREL–09/05
5
5 Page 
TS68C000
Table 2-1.
Symbol
VCC
VI
VO
VOZ
IO
Ii
Absolute Maximum Ratings
Parameter
Supply voltage
Input voltage
Output voltage
Off state voltage
Output currents
Input currents
PDMAX Max power dissipation
TSTG
TJ
TLEADS
Storage temperature
Junction temperature
Lead temperature
Test Conditions
TCASE = -55°C
TCASE = +125°C
Max 5 sec. Soldering
Min
-0.3
-0.3
NA
-0.3
NA
NA
-55
Max
+6.5
+6.5
NA
11.0
NA
NA
0.27
0.27
+150
+150
+270
Unit
V
V
V
V
mA
mA
W
W
°C
°C
°C
2.4.4.2
Recommended Condition of Use and Guaranteed Characteristics
• Guaranteed Characteristics (Table 2-5 and Table 2-8)
The characteristics associated to a specified measurement in the detail specification shall
only be for inspection purposes.
Such characteristic defined in this specification is guaranteed only under the conditions and
within the limits which are specified for the relevant measurement. Unless otherwise speci-
fied, this guarantee applies within all the recommended operating ranges specified below.
• Recommended conditions of use (Table 2-2)
To the correct operation of the device, the conditions of use shall be within the ranges speci-
fied below (see also above).
These conditions shall not be for inspection purposes.
Some recommended values may, however, be taken in other parts of this specification as
detail conditions for an applicable test (Table 2-9).
• Additional Electrical Characteristics (Table 2-9), see ”Additional Electrical Characteristics” on
page 30.
Figure 2-1. Clock Input Timing Diagram
tCL
tcyc
tCH
2.0V
0.8V
tCr
tCf
Note:
Timing measurements are referenced to and from a low voltage of 0.8V and a high voltage of 2.0V,
unless otherwise noted. The voltage swing through this range should start outside, and pass
through, the range such that the rise of fall will be linear between 0.8V and 2.0V.
Unless otherwise stated, all voltages are referenced to the reference terminal (see Table 1-1).
2170A–HIREL–09/05
11
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| Páginas | Total 30 Páginas | |
| PDF Descargar | [ Datasheet TS68C000.PDF ] | |
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