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Número de pieza | 74LVC125A | |
Descripción | Low-Voltage CMOS Quad Buffer | |
Fabricantes | ON Semiconductor | |
Logotipo | ||
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No Preview Available ! 74LVC125A
Low-Voltage CMOS
Quad Buffer
With 5 V−Tolerant Inputs and Outputs
(3−State, Non−Inverting)
The 74LVC125A is a high performance, non−inverting quad buffer
operating from a 1.2 to 3.6 V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5 V allows 74LVC125A inputs to be safely driven
from 5.0 V devices. The 74LVC125A is suitable for memory address
driving and all TTL level bus oriented transceiver applications.
Current drive capability is 24 mA at the outputs. The Output Enable
(OEn) inputs, when HIGH, disable the outputs by placing them in a
HIGH Z condition.
Features
• Designed for 1.2 to 3.6 V VCC Operation
• 5.0 V Tolerant − Interface Capability With 5.0 V TTL Logic
• Supports Live Insertion and Withdrawal
• IOFF Specification Guarantees High Impedance When VCC = 0 V
• 24 mA Output Sink and Source Capability
• Near Zero Static Supply Current in all Three Logic States (10 mA)
Substantially Reduces System Power Requirements
• ESD Performance: Human Body Model >2000 V
Machine Model >200 V
• These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
www.onsemi.com
MARKING
DIAGRAMS
14
1
14
SOIC−14
D SUFFIX
CASE 751A
1
LVC125AG
AWLYWW
14
1
TSSOP−14
DT SUFFIX
CASE 948G
14
LVC
125A
ALYWG
G
1
A
L, WL
Y, YY
W, WW
G or G
= Assembly Location
= Wafer Lot
= Year
= Work Week
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 7 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
October, 2015 − Rev. 0
1
Publication Order Number:
74LVC125A/D
1 page 74LVC125A
AC ELECTRICAL CHARACTERISTICS (tR = tF = 2.5 ns)
−405C to +855C
−405C to +1255C
Symbol
Parameter
Conditions
Min Typ1 Max Min Typ1 Max Unit
tpd Propagation Delay (Note 5)
Dn to On
VCC = 1.2 V
− 12.0 −
−
VCC = 1.65 V to 1.95 V 1.5 5.4 11.0 1.5
−−
− 12.8
ns
VCC = 2.3 V to 2.7 V 1.0 2.9 5.7 1.0 − 6.7
VCC = 2.7 V
1.5 2.8 5.5 1.5 − 7.0
VCC = 3.0 V to 3.6 V 1.0 2.5 4.8 1.0 − 6.0
ten Enable Time (Note 6)
OEn to On
VCC = 1.2 V
− 16.0 −
−
VCC = 1.65 V to 1.95 V 1.0 5.0 12.2 1.0
−−
− 14.2
ns
VCC = 2.3 V to 2.7 V 0.5 2.9 6.8 0.5 − 7.9
VCC = 2.7 V
1.5 3.1 6.6 1.5 − 8.5
VCC = 3.0 V to 3.6 V 1.0 2.3 5.4 1.0 − 7.0
tdis Disable Time (Note 7)
OEn to On
VCC = 1.2 V
− 7.0 − − − − ns
VCC = 1.65 V to 1.95 V 2.2 4.6 7.5 2.2 − 8.7
VCC = 2.3 V to 2.7 V 0.5 2.6 4.2 0.5 − 5.0
VCC = 2.7 V
1.5 3.1 5.0 1.5 − 6.5
VCC = 3.0 V to 3.6 V 1.0 3.2 4.6 1.0 − 6.0
tsk(0) Output Skew Time (Note 8)
− − 1 − − 1.5 ns
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Typical values are measured at TA = 25°C and VCC = 3.3 V, unless stated otherwise.
5. tpd is the same as tPLH and tPHL.
6. ten is the same as tPZL and tPZH.
7. tdis is the same as tPLZ and tPHZ.
8. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design.
DYNAMIC SWITCHING CHARACTERISTICS
Symbol
Characteristic
Condition
TA = +25°C
Min Typ Max
Unit
VOLP
Dynamic LOW Peak Voltage (Note 9)
VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
0.8
0.6
V
VOLV
Dynamic LOW Valley Voltage (Note 9) VCC = 3.3 V, CL = 50 pF, VIH = 3.3 V, VIL = 0 V
VCC = 2.5 V, CL = 30 pF, VIH = 2.5 V, VIL = 0 V
−0.8
−0.6
V
9. Number of outputs defined as “n”. Measured with “n−1” outputs switching from HIGH−to−LOW or LOW−to−HIGH. The remaining output is
measured in the LOW state.
CAPACITIVE CHARACTERISTICS
Symbol
Parameter
Condition
CIN Input Capacitance
VCC = 3.3 V, VI = 0 V or VCC
COUT Output Capacitance
VCC = 3.3 V, VI = 0 V or VCC
CPD Power Dissipation Capacitance
(Note 10)
Per input; VI = GND or VCC
VCC = 1.65 V to 1.95 V
VCC = 2.3 V to 2.7 V
VCC = 3.0 V to 3.6 V
10. CPD is used to determine the dynamic power dissipation (PD in mW).
PD = CPD x VCC2 x fi x N + S (CL x VCC2 x fo) where:
fi = input frequency in MHz; fo = output frequency in MHz
CL = output load capacitance in pF VCC = supply voltage in Volts
N = number of outputs switching
S(CL x VCC2 x fo) = sum of the outputs.
Typical
4.0
5.0
6.0
9.4
12.4
Unit
pF
pF
pF
www.onsemi.com
5
5 Page |
Páginas | Total 9 Páginas | |
PDF Descargar | [ Datasheet 74LVC125A.PDF ] |
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