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PDF B9940L Data sheet ( Hoja de datos )
| Número de pieza | B9940L | |
| Descripción | 1:18 Clock Distribution Buffer | |
| Fabricantes | Cypress Semiconductor | |
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B9940L
2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
Features
• 200-MHz clock support
• LVPECL or LVCMOS/LVTTL clock input
• LVCMOS/LVTTL compatible inputs
• 18 clock outputs: drive up to 36 clock lines
• 150-ps max. output-to-output skew
• Dual- or single-supply operation:
— 3.3V core and 3.3V outputs
— 3.3V core and 2.5V outputs
— 2.5V core and 2.5V outputs
• Pin-compatible with MPC940L
• Industrial temperature range: -40°C to 85°C
• 32-pin LQFP package
Block Diagram
Description
The B9940L is a low-voltage clock distribution buffer with the
capability to select either a differential LVPECL- or an
LVCMOS/LVTTL-compatible input clock. The two clock
sources can be used to provide for a test clock as well as the
primary system clock. All other control inputs are
LVCMOS/LVTTL compatible. The eighteen outputs are 2.5V or
3.3V compatible and can drive two series-terminated 50Ω
transmission lines. With this capability the B9940L has an
effective fan-out of 1:36. Low output-to-output skews make the
B9940L an ideal clock distribution buffer for nested clock trees
in the most demanding of synchronous systems.
Pin Configuration
PECL_CLK
PECL_CLK#
TCLK
TCLK_SEL
VDD
0
1
VDDC
18 Q0-Q17
VSS
VSS
TCLK
TCLK_SEL
PECL_CLK
PECL_CLK#
VDD
VDDC
1 24 Q6
2 23 Q7
3 22 Q8
B 9 9 4 0 L4 21 VDD
5 20 Q9
6 19 Q10
7 18 Q11
8 17 VSS
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Cypress Semiconductor Corporation • 3901 North First Street • San Jose, CA 95134 • 408-943-2600
Document #: 38-07105 Rev. *C
Revised December 26, 2002
1 page  
B9940L
Document History Page
Document Title: B9940L 2.5V or 3.3V, 200-MHz, 1:18 Clock Distribution Buffer
Document Number: 38-07105
REV.
ECN NO.
Issue
Date
Orig. of
Change
Description of Change
**
107509 06/14/01
NDP Convert from IMI to Cypress
*A 116093 09/09/02 HWT Converted from Word Doc to Framemaker
Corrected the Ordering Information to match the DevMaster
Corrected Output Impedance Type to 9/11,14/18, and 19/26 in DC parameters
*B
120824 11/21/02
RGL Corrected minor typo
*C
122783 12/26/02
RBI Add power up requirements to maximum ratings information
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Document #: 38-07105 Rev. *C
Page 5 of 5
5 Page | ||
| Páginas | Total 5 Páginas | |
| PDF Descargar | [ Datasheet B9940L.PDF ] | |
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