|
|
PDF ICS83023I Data sheet ( Hoja de datos )
| Número de pieza | ICS83023I | |
| Descripción | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER | |
| Fabricantes | Integrated Circuit Systems | |
| Logotipo |  |
|
Hay una vista previa y un enlace de descarga de ICS83023I (archivo pdf) en la parte inferior de esta página. Total 12 Páginas | ||
|
No Preview Available !
Integrated
Circuit
Systems, Inc.
ICS83023I
DUAL, 1-TO-1
DIFFERENTIAL-TO-LVCMOS TRANSLATOR /BUFFER
GENERAL DESCRIPTION
The ICS83023I is a dual, 1-to-1 Differential-to-
ICS LVCMOS Translator/Fanout Buffer and a mem-
HiPerClockS™ ber of the HiPerClockS™ family of High Perfor-
mance Clock Solutions from ICS. The differen-
tial inputs can accept most differential signal
types (LVDS, LVHSTL, LVPECL, SSTL, and HCSL) and
translate into two single-ended LVCMOS outputs. The small
8-lead SOIC footprint makes this device ideal for use in ap-
www.DataSheept4liUca.ctioomns with limited board space.
Features
• Two LVCMOS / LVTTL outputs
• Two differential CLKx, nCLKx input pairs
• CLK, nCLK pairs can accept the following differential
input levels: LVDS, LVPECL, LVHSTL, SSTL, HCSL
• Maximum output frequency: 350MHz (typical)
• Output skew: 60ps (maximum)
• Part-to-part skew: 500ps (maximum)
• Additive phase jitter, RMS: 0.14ps (typical)
• Small 8 lead SOIC package saves board space
• 3.3V operating supply
• -40°C to 85°C ambient operating temperature
• Available in both standard and lead-free RoHS-compliant
packages
BLOCK DIAGRAM
CLK0
nCLK0
CLK1
nCLK1
Q0
Q1
PIN ASSIGNMENT
CLK0
nCLK0
nCLK1
CLK1
1
2
3
4
8 VDD
7 Q0
6 Q1
5 GND
ICS83023I
8-Lead SOIC
3.8mm x 4.8mm x 1.47mm package body
M Package
Top View
83023AMI
www.icst.com/products/hiperclocks.html
1
REV. B JANUARY 18, 2006
1 page  
Integrated
Circuit
Systems, Inc.
ICS83023I
DUAL, 1-TO-1
DIFFERENTIAL-TO-LVCMOS TRANSLATOR /BUFFER
ADDITIVE PHASE JITTER
The spectral purity in a band at a specific offset from the
fundamental compared to the power of the fundamental is
called the dBc Phase Noise. This value is normally expressed
using a Phase noise plot and is most often the specified plot
in many applications. Phase noise is defined as the ratio of
the noise power present in a 1Hz band at a specified offset
www.DataSheeftr4oUm.cotmhe fundamental frequency to the power value of the
fundamental. This ratio is expressed in decibels (dBm) or a
ratio of the power in the 1Hz band to the power in the funda-
mental. When the required offset is specified, the phase noise
is called a dBc value, which simply means dBm at a specified
offset from the fundamental. By investigating jitter in the fre-
quency domain, we get a better understanding of its effects
on the desired application over the entire time record of the
signal. It is mathematically possible to calculate an expected
bit error rate given a phase noise plot.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
-100
-110
-120
-130
-140
-150
-160
-170
-180
-190
1k
Additive Phase Jitter @ 100MHz
(12kHz to 20MHz)
= 0.14ps typical
10k 100k 1M 10M
OFFSET FROM CARRIER FREQUENCY (HZ)
100M
As with most timing specifications, phase noise measure-
ments have issues. The primary issue relates to the limita-
tions of the equipment. Often the noise floor of the equipment
is higher than the noise floor of the device. This is illustrated
above. The device meets the noise floor of what is shown, but
can actually be lower. The phase noise is dependant on the
input source and measurement equipment.
83023AMI
www.icst.com/products/hiperclocks.html
5
REV. B JANUARY 18, 2006
5 Page 
Integrated
Circuit
Systems, Inc.
ICS83023I
DUAL, 1-TO-1
DIFFERENTIAL-TO-LVCMOS TRANSLATOR /BUFFER
TABLE 7. ORDERING INFORMATION
Part/Order Number
Marking
Package
Shipping Packaging Temperature
ICS83023AMI
83021AMI
8 lead SOIC
tube -40°C to 85°C
ICS83023AMIT
83021AMI
8 lead SOIC
2500 tape & reel
-40°C to 85°C
ICS83023AMILF
83023AIL
8 lead "Lead-Free" SOIC
tube -40°C to 85°C
ICS83023AMILFT
83023AIL
8 lead "Lead-Free" SOIC
2500 tape & reel
-40°C to 85°C
NOTE: Parts that are ordered with an "LF" suffix to the part number are the Pb-Free configuration and are RoHS compliant.
www.DataSheet4U.com
The aforementioned trademark, HiPerClockS is a trademark of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries.
While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use
or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use
in normal commercial and industiral applications. Any other applications such as those requiring high reliability, or other extraordinary environmental requirements are not
recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product
for use in life support devices or critical medical instruments.
83023AMI
www.icst.com/products/hiperclocks.html
REV. B JANUARY 18, 2006
11
11 Page | ||
| Páginas | Total 12 Páginas | |
| PDF Descargar | [ Datasheet ICS83023I.PDF ] | |
Hoja de datos destacado
| Número de pieza | Descripción | Fabricantes |
| ICS83023 | DUAL 1-TO-1 DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER |  Integrated Circuit Solution |
| ICS83023I | DIFFERENTIAL-TO-LVCMOS TRANSLATOR/BUFFER | Integrated Circuit Systems |
| ICS83023I | 1-TO-1 DIFFERENTIAL-TOLVCMOS TRANSLATOR/BUFFER |  Integrated Device Technology |
| Número de pieza | Descripción | Fabricantes |
| SLA6805M | High Voltage 3 phase Motor Driver IC. |
 Sanken |
| SDC1742 | 12- and 14-Bit Hybrid Synchro / Resolver-to-Digital Converters. |
 Analog Devices |
|
DataSheet.es es una pagina web que funciona como un repositorio de manuales o hoja de datos de muchos de los productos más populares, |
| DataSheet.es | 2020 | Privacy Policy | Contacto | Buscar |