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PDF 74VCX16240 Data sheet ( Hoja de datos )
| Número de pieza | 74VCX16240 | |
| Descripción | Low-Voltage 1.8/2.5/3.3V 16-Bit Buffer | |
| Fabricantes | ON Semiconductor | |
| Logotipo |  |
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74VCX16240
Low−Voltage 1.8/2.5/3.3V
16−Bit Buffer
With 3.6 V−Tolerant Inputs and Outputs
(3−State, Inverting)
The 74VCX16240 is an advanced performance, inverting 16−bit
buffer. It is designed for very high−speed, very low−power operation
in 1.8 V, 2.5 V or 3.3 V systems.
When operating at 2.5 V (or 1.8 V) the part is designed to tolerate
voltages it may encounter on either inputs or outputs when interfacing
to 3.3 V busses. It is guaranteed to be over−voltage tolerant to 3.6 V.
The 74VCX16240 is nibble controlled with each nibble functioning
identically, but independently. The control pins may be tied together to
obtain full 16−bit operation. The 3−state outputs are controlled by an
Output Enable (OEn) input for each nibble. When OEn is LOW, the
outputs are on. When OEn is HIGH, the outputs are in the high
impedance state.
Features
• Designed for Low Voltage Operation: VCC = 1.65 V − 3.6 V
• 3.6V Tolerant Inputs and Outputs
• High Speed Operation: 2.5 ns max for 3.0 V to 3.6 V
3.0 ns max for 2.3 V to 2.7 V
6.0 ns max for 1.65 V to 1.95 V
• Static Drive:
±24 mA Drive at 3.0 V
±18 mA Drive at 2.3 V
±6 mA Drive at 1.65 V
• Supports Live Insertion and Withdrawal
• IOFF Specification Guarantees High Impedance When VCC = 0 V
• Near Zero Static Supply Current in All Three Logic States (20 mA)
Substantially Reduces System Power Requirements
• Latchup Performance Exceeds ±250 mA @ 125°C
• ESD Performance: Human Body Model >2000 V;
Machine Model >200 V
• All Devices in Package TSSOP are Inherently Pb−Free*
http://onsemi.com
MARKING DIAGRAM
48
48
1
TSSOP−48
DT SUFFIX
CASE 1201
A
WL
YY
WW
VCX16240
AWLYYWW
1
= Assembly Location
= Wafer Lot
= Year
= Work Week
ORDERING INFORMATION
Device
Package
Shipping†
74VCX16240DT
TSSOP
(Pb−Free)
39 / Rail
74VCX16240DTR
TSSOP
(Pb−Free)
2500 / Reel
†For information on tape and reel specifications,
including part orientation and tape sizes, please
refer to our Tape and Reel Packaging Specification
Brochure, BRD8011/D.
*For additional information on our Pb−Free strategy and soldering details, please
download the ON Semiconductor Soldering and Mounting Techniques
Reference Manual, SOLDERRM/D.
© Semiconductor Components Industries, LLC, 2006
June, 2006 − Rev. 5
1
Publication Order Number:
74VCX16240/D
1 page  
74VCX16240
AC CHARACTERISTICS (Note 4; tR = tF = 2.0 ns; CL = 30 pF; RL = 500 W)
TA = −40°C to +85°C
VCC = 3.0 V to 3.6 V VCC = 2.3 V to 2.7 V VCC = 1.65 to 1.95V
Symbol
Parameter
Waveform Min Max Min Max
Min
Max Unit
tPLH Propagation Delay
tPHL Input to Output
1
0.8 2.5 1.0 3.0
1.5
6.0 ns
0.8 2.5 1.0 3.0
1.5
6.0
tPZH
tPZL
Output Enable Time to
High and Low Level
2
0.8 3.5 1.0 4.1
1.5
8.2 ns
0.8 3.5 1.0 4.1
1.5
8.2
tPHZ
tPLZ
Output Disable Time From
High and Low Level
2
0.8 3.5 1.0 3.8
1.5
7.8 ns
0.8 3.5 1.0 3.8
1.5
7.8
tOSHL
tOSLH
Output−to−Output Skew
(Note 5)
0.5 0.5
0.5 0.5
0.75 ns
0.75
4. For CL = 50 pF, add approximately 300 ps to the AC maximum specification.
5. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
AC CHARACTERISTICS (tR = tF = 2.0 ns; CL = 50 pF; RL = 500 W)
TA = −40°C to +85°C
VCC = 3.0V to 3.6V
VCC = 2.7V
Symbol
Parameter
Waveform
Min
Max Min Max Unit
tPLH Propagation Delay
tPHL Input to Output
3 1.0
1.0
3.9
3.9
5.3 ns
5.3
tPZH
tPZL
Output Enable Time to
High and Low Level
4 1.0
1.0
5.0
5.0
6.1 ns
6.1
tPHZ
tPLZ
Output Disable Time From
High and Low Level
4
1.0
1.0
4.4
4.4
4.8 ns
4.8
tOSHL
tOSLH
Output−to−Output Skew
(Note 6)
0.5 0.5 ns
0.5 0.5
6. Skew is defined as the absolute value of the difference between the actual propagation delay for any two separate outputs of the same device.
The specification applies to any outputs switching in the same direction, either HIGH−to−LOW (tOSHL) or LOW−to−HIGH (tOSLH); parameter
guaranteed by design.
http://onsemi.com
5
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| Páginas | Total 9 Páginas | |
| PDF Descargar | [ Datasheet 74VCX16240.PDF ] | |
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