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PDF 74VHCT16240A Data sheet ( Hoja de datos )

Número de pieza 74VHCT16240A
Descripción 16-BIT BUS BUFFER
Fabricantes ST Microelectronics 
Logotipo ST Microelectronics Logotipo



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74VHCT16240A
16-BIT BUS BUFFER
WITH 3-STATE OUTPUTS (INVERTED)
s HIGH SPEED: tPD = 5.6 ns (TYP.) at VCC = 5V
s LOW POWER DISSIPATION:
ICC = 4 µA (MAX.) at TA=25°C
s COMPATIBLE WITH TTL OUTPUTS:
VIH = 2V (MIN.), VIL = 0.8V (MAX)
s POWER DOWN PROTECTION ON INPUTS
& OUTPUTS
s SYMMETRICAL OUTPUT IMPEDANCE:
|IOH| = IOL = 8 mA (MIN)
s BALANCED PROPAGATION DELAYS:
tPLH tPHL
s OPERATING VOLTAGE RANGE:
VCC(OPR) = 4.5V to 5.5V
s IMPROVED LATCH-UP IMMUNITY
s LOW NOISE: VOLP = 0.9V (MAX.)
DESCRIPTION
The 74VHCT16240A is an advanced high-speed
CMOS 16-BIT BUS BUFFER (3-STATE)
fabricated with sub-micron silicon gate and
double-layer metal wiring C2MOS technology.
Any nG output control governs four BUS
BUFFERS. Output Enable inputs (nG) tied
together give full 16 bit operation.
When nG is LOW, the outputs are on. When nG is
HIGH, the output are in high impedance state.
This device is designed to be used with 3 state
memory address drivers, etc.
Power down protection is provided on all inputs
and outputs and 0 to 7V can be accepted on
inputs with no regard to the supply voltage. This
device can be used to interface 5V to 3V since all
inputs are equipped with TTL threshold
All inputs and outputs are equipped with
protection circuits against static discharge, giving
them 2KV ESD immunity and transient excess
voltage.
TSSOP
ORDER CODES
PACKAGE
TSSOP
TUBE
PIN CONNECTION
T&R
74VHCT16240ATTR
February 2003
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74VCHT16240A
CAPACITIVE CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
CIN Input Capacitance
5 10 10 10 pF
COUT
Output
Capacitance
9 pF
CPD Power Dissipation
Capacitance
(note 1)
21
pF
1) CPD is defined as the value of the IC’s internal equivalent capacitance which is calculated from the operating current consumption without
load. (Refer to Test Circuit). Average operating current can be obtained by the following equation. ICC(opr) = CPD x VCC x fIN + ICC/16 (per
Circuit)
DYNAMIC SWITCHING CHARACTERISTICS
Test Condition
Value
Symbol
Parameter
VCC
(V)
TA = 25°C
-40 to 85°C -55 to 125°C Unit
Min. Typ. Max. Min. Max. Min. Max.
VOLP
VOLV
Dynamic Low
Voltage Quiet
Output (note 1, 2)
5.0
0.9 1.1
1.1 -0.9
VIHD
Dynamic High
Voltage Input
(note 1, 3)
5.0 CL = 50 pF 2.0
V
VILD
Dynamic Low
Voltage Input
(note 1, 3)
5.0
0.8
1) Worst case package.
2) Max number of outputs defined as (n). Data inputs are driven 0V to 3.0V, (n-1) outputs switching and one output at GND.
3) Max number of data inputs (n) switching. (n-1) switching 0V to 3.0V. Inputs under test switching: 3.0V to threshold (VILD), 0V to threshold
(VIHD), f=1MHz.
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