MC74AC125 반도체 회로 부품 판매점
Quad Buffer
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 ON Semiconductor |
MC74AC125, MC74ACT125
Quad Buffer with 3-State
Outputs
High−Performance Silicon−Gate CMOS
Features
• Outputs Source/Sink
• ′ACT125 Has TTL Compatible Inputs
• These are Pb−Free Devices
VCC A2 B2 O2 A3 B3 O3
14 13 12 11 10 9 8
1234567
A0 B0 O0 A1 B1 O1 GND
Figure 1. Pinout: 14−Lead Packages Conductors
(Top View)
PIN ASSIGNMENT
PIN FUNCTION
An, Bn
On
Inputs
Outputs
FUNCTION TABLE
Inputs
An Bn
LL
LH
HX
NOTE:
H = High Voltage Level;
L = Low Voltage Level;
Z = High Impedance;
X = Immaterial
Output
On
L
H
Z
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14
1
MARKING
DIAGRAMS
14
SOIC−14
D SUFFIX
CASE 751A
xxx125G
AWLYWW
1
1
14
TSSOP−14
DT SUFFIX
CASE 948G
14
xxx
125
ALYWG
G
1
xxx = AC or ACT
A = Assembly Location
WL or L = Wafer Lot
Y = Year
WW or W = Work Week
G or G = Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
See detailed ordering and shipping information in the package
dimensions section on page 5 of this data sheet.
© Semiconductor Components Industries, LLC, 2015
January, 2015 − Rev. 8
1
Publication Order Number:
MC74AC125/D
MC74AC125, MC74ACT125
MAXIMUM RATINGS
Symbol
Parameter
Value
Unit
VCC
VI
VO
IIK
IOK
IO
ICC
IGND
TSTG
TL
TJ
qJA
DC Supply Voltage
DC Input Voltage
DC Output Voltage
DC Input Diode Current
DC Output Diode Current
DC Output Sink/Source Current
DC Supply Current per Output Pin
DC Ground Current per Output Pin
Storage Temperature Range
Lead temperature, 1 mm from Case for 10 Seconds
Junction temperature under Bias
Thermal Resistance (Note 2)
(Note 1)
SOIC
TSSOP
*0.5 to )7.0
*0.5 v VI v VCC )0.5
*0.5 v VO v VCC )0.5
$20
$50
$50
$50
$50
*65 to )150
260
)150
125
170
V
V
V
mA
mA
mA
mA
mA
°C
°C
°C
°C/W
PD Power Dissipation in Still Air at 85°C
SOIC
TSSOP
125
170
mW
MSL
Moisture Sensitivity
Level 1
FR
VESD
Flammability Rating
ESD Withstand Voltage
Oxygen Index: 30% − 35%
Human Body Model (Note 3)
Machine Model (Note 4)
Charged Device Model (Note 5)
UL 94 V−0 @ 0.125 in
> 2000
> 200
> 1000
V
ILatch−Up Latch−Up Performance Above VCC and Below GND at 85°C (Note 6)
$100
mA
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. IO absolute maximum rating must be observed.
2. The package thermal impedance is calculated in accordance with JESD51−7.
3. Tested to EIA/JESD22−A114−A.
4. Tested to EIA/JESD22−A115−A.
5. Tested to JESD22−C101−A.
6. Tested to EIA/JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
Parameter
Min Typ Max Unit
VCC Supply Voltage
′AC
′ACT
2.0 5.0 6.0
V
4.5 5.0 5.5
Vin, Vout DC Input Voltage, Output Voltage (Ref. to GND)
0
−
VCC
V
tr, tf
Input Rise and Fall Time (Note 1)
′AC Devices except Schmitt Inputs
VCC @ 3.0 V
−
150
−
VCC @ 4.5 V
−
40
− ns/V
VCC @ 5.5 V
−
25
−
TJ Junction Temperature (PDIP)
− − 140 °C
TA Operating Ambient Temperature Range
−40 25
85 °C
IOH Output Current − HIGH
− − −24 mA
IOL Output Current − LOW
− − 24 mA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
1. Vin from 30% to 70% VCC; see individual Data Sheets for devices that differ from the typical input rise and fall times.
2. Vin from 0.8 V to 2.0 V; see individual Data Sheets for devices that differ from the typical input rise and fall times.
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MC74AC125 buffer
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