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PDF 74F433 Data sheet ( Hoja de datos )

Número de pieza 74F433
Descripción First-In First-Out (FIFO) Buffer Memory
Fabricantes Fairchild 
Logotipo Fairchild Logotipo



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No Preview Available ! 74F433 Hoja de datos, Descripción, Manual

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April 1988
Revised August 1999
74F433
First-In First-Out (FIFO) Buffer Memory
General Description
The 74F433 is an expandable fall-through type high-speed
First-In First-Out (FIFO) Buffer Memory that is optimized for
high-speed disk or tape controller and communication
buffer applications. It is organized as 64-words by 4-bits
and may be expanded to any number of words or any num-
ber of bits in multiples of four. Data may be entered or
extracted asynchronously in serial or parallel, allowing eco-
nomical implementation of buffer memories.
The 74F433 has 3-STATE outputs that provide added ver-
satility, and is fully compatible with all TTL families.
Features
s Serial or parallel input
s Serial or parallel output
s Expandable without additional logic
s 3-STATE outputs
s Fully compatible with all TTL families
s Slim 24-pin package
s 9423 replacement
Ordering Code:
Order Number Package Number
Package Description
74F433SPC
N24C
24-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-100, 0.300 Wide
Logic Symbol
Connection Diagram
© 1999 Fairchild Semiconductor Corporation DS009544
www.fairchildsemi.com

1 page




74F433 pdf
FIGURE 3. Conceptual Output Section
5 www.fairchildsemi.com

5 Page





74F433 arduino
AC Electrical Characteristics
Symbol
Parameter
tPHL Propagation Delay, Negative-Going
CPSI to IRF Output
tPLH Propagation Delay,
Negative-Going TTS to IRF
tPLH Propagation Delay, Negative-Going
tPHL CPSO to QS Output
tPLH Propagation Delay, Positive-Going
tPHL TOP to Q0–Q3 Outputs
tPHL Propagation Delay,
Negative-Going CPSO to ORE
tPHL Propagation Delay,
Negative-Going TOP to ORE
tPLH Propagation Delay, Positive-Going
TOP to ORE
tPLH Propagation Delay, Negative-Going
TOS to Positive-Going ORE
tPHL Propagation Delay, Positive-
Going PL to Negative-Going IRF
tPLH Propagation Delay, Negative-
Going PL to Positive-Going IRF
tPLH Propagation Delay,
Positive-Going OES to ORE
tPLH Propagation Delay Positive-IRF
Going IES to Positive-Going
tPHL Propagation Delay
MR to ORE
tPLH Propagation Delay
MR to IRF
tPZH
Enable Time
tPZL
tPHZ
OE to Q0–Q3
Disable Time
tPLZ
tPZH
OE to Q0–Q3
Enable Time
tPZL Negative-Going OES to QS
tPHZ Disable Time
tPLZ Negative-Going OES to QS
tPZH
Enable Time
tPZL TOS to QS
tDFT Fall-Through Time
tAP Parallel Appearance Time
ORE to Q0–Q3
tAS Serial Appearance Time
ORE to QS
TA = +25°C
VCC = +5.0V
CL = 50 pF
Min Max
2.0 17.0
9.0 34.0
4.0 25.0
5.0 20.0
8.0 35.0
7.0 30.0
7.0 25.0
6.0 26.0
13.0
48.0
13.0
45.0
4.0 22.0
7.0 31.0
9.0 38.0
5.0
7.0
5.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
0.2
20.0
20.0
25.0
28.0
27.0
16.0
14.0
10.0
23.0
10.0
14.0
10.0
14.0
35.0
35.0
0.9
2.0
5.0
TA = 0°C to +70°C
VCC = +5.0V
CL = 50 pF
Min Max
2.0 18.0
8.0 38.0
3.0 27.0
5.0 21.0
7.0 38.0
7.0 32.0
6.0 28.0
6.0 28.0
12.0
51.0
12.0
50.0
4.0 23.0
6.0 35.0
8.0 44.0
Units
Figure
Number
ns
Figure 11
Figure 12
ns
Figure 13
Figure 14
ns Figure 15
ns
Figure 13
Figure 14
ns Figure 15
ns
Figure 13
Figure 14
Figure 17
ns Figure 18
ns
5.0
7.0
5.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
0.2
20.0
20.0
27.0
31.0
30.0
18.0
16.0
12.0
30.0
12.0
15.0
12.0
16.0
42.0
39.0
1.0
2.0
5.0
ns Figure 18
ns
ns
ns
ns
ns
ns Figure 16
ns
11 www.fairchildsemi.com

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