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PDF W40S01-04 Data sheet ( Hoja de datos )
| Número de pieza | W40S01-04 | |
| Descripción | SDRAM Buffer - 4 DIMM | |
| Fabricantes | Cypress Semiconductor | |
| Logotipo |  |
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W40S01-04
Features
• Eighteen skew controlled CMOS outputs (SDRAM0:17)
• Supports four SDRAM DIMMs
• Ideal for high-performance systems designed around
Intel®’s 440BX chip set
• I2C serial configuration interface
• Output skew between any two outputs is less than
250 ps
• 1 to 5 ns propagation delay
• DC to 133-MHz operation
• Single 3.3V supply voltage
• Low power CMOS design packaged in a 48-pin SSOP
(Small Shrink Outline Package)
Overview
The Cypress W40S01-04 is a low-voltage, eighteen-output
signal buffer. Output buffer impedance is approximately 15Ω
which is ideal for driving SDRAM DIMMs.
Block Diagram
SDRAM Buffer - 4 DIMM
Key Specifications
Supply Voltages: ....................................... VDDQ3 = 3.3V±5%
Operating Temperature:.................................... 0°C to +70°C
Input Threshold: .................................................. 1.5V typical
Maximum Input Voltage: ...................................VDDQ3 + 0.5V
Input Frequency:............................................... 0 to 133 MHz
BUF_IN to SDRAM0:17 Propagation Delay: ...... 1.0 to 5.0 ns
Output Edge Rate:.................................................. >1.5 V/ns
Output Skew: ............................................................ ±250 ps
Output Duty Cycle: .................................. 45/55% worst case
Output Impedance: ........................................15 ohms typical
Output Type: ................................................ CMOS rail-to-rail
Part to Part Skew:........................................................700 ps
Pin Configuration
SDATA
SCLOCK
Serial Port
Device Control
BUF_IN
OE
SDRAM0
SDRAM1
SDRAM2
SDRAM3
SDRAM4
SDRAM5
SDRAM6
SDRAM7
SDRAM8
SDRAM9
SDRAM10
SDRAM11
SDRAM12
SDRAM13
SDRAM14
SDRAM15
SDRAM16
SDRAM17
NC
NC
VDDQ3
SDRAM0
SDRAM1
GND
VDDQ3
SDRAM2
SDRAM3
GND
BUF_IN
VDDQ3
SDRAM4
SDRAM5
GND
VDDQ3
SDRAM6
SDRAM7
GND
VDDQ3
SDRAM16
GND
VDDQ3
SDATA [1]
SSOP
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48 NC
47 NC
46 VDDQ3
45 SDRAM15
44 SDRAM14
43 GND
42 VDDQ3
41 SDRAM13
40 SDRAM12
39 GND
38 OE[1]
37 VDDQ3
36 SDRAM11
35 SDRAM10
34 GND
33 VDDQ3
32 SDRAM9
31 SDRAM8
30 GND
29 VDDQ3
28 SDRAM17
27 GND
26
25
GSCNLDOCK[1]
Note:
1. Internal pull-up resistor of 250K on SDATA, SCLOCK, and OE
inputs (not CMOS level).
Intel is a registered trademark of Intel Corporation.
Cypress Semiconductor Corporation • 3901 North First Street • San Jose • CA 95134 • 408-943-2600
June 20, 2000, rev. **
1 page  
W40S01-04
How To Use the Serial Data Interface
Electrical Requirements
Figure 1 illustrates electrical characteristics for the serial inter-
face bus used with the W40S01-04. Devices send data over
the bus with an open drain logic output that can (a) pull the bus
line LOW, or (b) let the bus default to logic 1. The pull-up resis-
tor on the bus (both clock and data lines) establish a default
logic 1. All bus devices generally have logic inputs to receive
data.
Although the W40S01-04 is a receive-only device (no data
write-back capability), it does transmit an “acknowledge” data
pulse after each byte is received. Thus, the SDATA line can
both transmit and receive data.
The pull-up resistor should be sized to meet the rise and fall
times specified in AC parameters, taking into consideration to-
tal bus line capacitance.
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Figure 1. Serial Interface Bus Electrical Characteristics
5
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| PDF Descargar | [ Datasheet W40S01-04.PDF ] | |
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